IP Library Granted Patent US 7,453,157
Granted Patent B2
US 7,453,157 · App. 11/140,312 · Granted Nov 18, 2008

Microelectronic packages and methods therefor

Assignee: Tessera, Inc.
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Quick Facts
Patent No.
US 7,453,157
App. No.
11/140,312
Filed
May 27, 2005
Granted
Nov 18, 2008
Kind
B2
Examiner
CHU, CHRIS C
Art Unit
2815
USPC
257/785
Abstract

A microelectronic package includes a microelectronic element having faces, contacts and an outer perimeter, and a flexible substrate overlying and spaced from a first face of the microelectronic element, an outer region of the flexible substrate extending beyond the outer perimeter of the microelectronic element. The package includes a plurality of etched conductive posts exposed at a surface of the flexible substrate and being electrically interconnected with the microelectronic element, wherein at least one of the conductive posts is disposed in the outer region of the flexible substrate, and a compliant layer disposed between the first face of the microelectronic element and the flexible substrate, wherein the compliant layer overlies the at least one of the conductive posts that is disposed in the outer region of the flexible substrate. The package includes an encapsulating mold material in contact with the microelectronic element and the compliant layer, whereby the encapsulating mold material overlies the outer region of the flexible substrate.

Claims (55)

1. A microelectronic package comprising:

a microelectronic element having faces and contacts, said microelectronic element having an outer perimeter;

a flexible substrate overlying and spaced from a first face of said microelectronic element, wherein an outer region of said flexible substrate extends beyond the outer perimeter of said microelectronic element;

a plurality of etched conductive posts having tips exposed at a surface of said flexible substrate, said etched conductive posts being electrically interconnected with said microelectronic element, wherein at least one of said conductive posts is disposed in the outer region of said flexible substrate;

a compliant layer disposed between the first face of said microelectronic element and said flexible substrate, wherein said compliant layer overlies the at least one of said conductive posts that is disposed in the outer region of said flexible substrate, said compliant layer permitting movement of said conductive posts independently of each other in a direction relative to said microelectronic element; and

an encapsulating mold material in contact with said microelectronic element and said compliant layer, wherein said encapsulating mold material overlies the outer region of said flexible substrate,

such that pressing said plurality of conductive posts towards corresponding conductive elements of an external element establishes conductive contact between said tips of said plurality of conductive posts and said corresponding conductive elements by deforming said compliant layer to accommodate at least one of a difference in a height of said tips or a difference in a height of said corresponding conductive elements.

2. The package as claimed in claim 1 , wherein said flexible substrate includes a dielectric material.

3. The package as claimed in claim 2 , wherein said dielectric material includes a polymer.

4. The package as claimed in claim 1 , wherein said first face is a front face of said microelectronic element and said contacts are accessible at said front face.

5. The package as claimed in claim 1 , wherein said microelectronic element has a second face facing away from said flexible substrate, and wherein said contacts are accessible at said second face.

6. The package as claimed in claim 1 , wherein said microelectronic element is operable to interchange signals at a frequency above about 300 MHz through at least some of said conductive posts.

7. The package as claimed in claim 1 , further comprising conductive traces provided on said flexible substrate, wherein said conductive traces electrically interconnect at least some of said conductive posts with said microelectronic element.

8. The package as claimed in claim 7 , wherein said flexible substrate has a first surface facing said microelectronic element and said conductive traces extend along the first surface of said flexible substrate.

9. The package as claimed in claim 7 , wherein said flexible substrate has a second surface facing away from said microelectronic element and said conductive traces extend along the second surface of said flexible substrate.

10. The package as claimed in claim 1 , wherein said contacts are spaced in a grid array over one of said faces of said microelectronic element.

11. The package as claimed in claim 1 , wherein said contacts are disposed in one or more rows extending over one of said faces of said microelectronic element.

12. The package as claimed in claim 1 , wherein said encapsulating mold material includes a rigid protective layer covering said microelectronic element and a first surface of said compliant layer facing away from said conductive posts.

13. The package as claimed in claim 12 , wherein said rigid protective layer is made of a material selected from the group consisting of epoxies, glass and polymers.

14. The package as claimed in claim 12 , wherein said flexible substrate extends beyond the outer edge of said compliant layer to define a gap and wherein said rigid protective layer fills the gap.

15. The package as claimed in claim 1 , wherein said microelectronic element comprises a semiconductor chip.

16. A microelectronic assembly comprising a package as claimed in claim 1 and a circuit panel having contact pads, said conductive posts having tips remote from said flexible substrate confronting said contact pads and electrically connected thereto.

17. The assembly as claimed in claim 16 , further comprising an electrically conductive bonding material securing said conductive posts to said contact pads.

18. The microelectronic package as claimed in claim 1 , wherein said conductive posts extend through said flexible substrate.

19. The microelectronic package as claimed in claim 1 , wherein said conductive posts have bases in contact with the surface of said flexible substrate.

20. The microelectronic package as claimed in claim 1 , wherein said flexible substrate has an inner region that is aligned with said microelectronic element and at least one of said conductive posts is disposed within the inner region of said flexible substrate.

21. A microelectronic package comprising:

a microelectronic element having faces and contacts, said microelectronic element having an outer perimeter;

a flexible substrate overlying and spaced from a first face of said microelectronic element;

a plurality of conductive posts exposed at a surface of said flexible substrate and being electrically interconnected with said microelectronic element, said conductive posts having flat tips that are substantially coplanar with one another, at least one of said conductive posts being located in an outer region of said flexible substrate that extends beyond the outer perimeter of said microelectronic element;

a compliant layer disposed between the first face of said microelectronic element and said flexible substrate, wherein said compliant layer includes a section that overlies the at least one of said conductive posts located in the outer region of said flexible substrate, said compliant layer permitting movement of said conductive posts independently of each other in a direction relative to said microelectronic element; and

a protective layer in contact with said microelectronic element and the section of said compliant layer that overlies the at least one of said conductive posts located in the outer region of said flexible substrate,

such that pressing said plurality of conductive posts towards corresponding conductive elements of an external element establishes conductive contact between said tips of said plurality of conductive posts and said corresponding conductive elements by deforming said compliant layer to accommodate at least one of a difference in a height of said tips or a difference in a height of said corresponding conductive elements.

22. The package as claimed in claim 21 , wherein said flexible substrate includes a dielectric sheet.

23. The package as claimed in claim 22 , wherein said dielectric sheet includes a polymer.

24. The package as claimed in claim 21 , wherein said flexible substrate includes conductive traces for electrically interconnecting said microelectronic element and said conductive posts.

25. The package as claimed in claim 24 , wherein said flexible substrate has a first surface facing said microelectronic element and a second surface facing away from said microelectronic element.

26. The package as claimed in claim 25 , wherein said conductive traces overly the first surface of said flexible substrate.

27. The package as claimed in claim 25 , wherein said conductive traces overly the second surface of said flexible substrate.

28. The package as claimed in claim 21 , wherein said microelectronic element has a first face facing toward said flexible substrate and a second face facing away from said flexible substrate.

29. The package as claimed in claim 28 , wherein said contacts are accessible at said first face of said microelectronic element.

30. The package as claimed in claim 28 , wherein said contacts are accessible at said second face of said microelectronic element.

31. The package as claimed in claim 30 , further comprising wire bonds for electrically interconnecting said microelectronic element and said conductive posts.

32. The package as claimed in claim 21 , wherein said microelectronic element comprises a semiconductor chip.

33. The microelectronic package as claimed in claim 21 , wherein said conductive posts extend through said flexible substrate.

34. The microelectronic package as claimed in claim 21 , wherein said conductive posts have bases in contact with the surface of said flexible substrate.

35. The microelectronic package as claimed in claim 21 , wherein said flexible substrate has an inner region that is aligned with said microelectronic element and at least one of said conductive posts is disposed within the inner region of said flexible substrate.

36. A microelectronic package comprising:

a microelectronic element having faces and contacts, said microelectronic element having an outer perimeter;

a flexible substrate overlying and spaced from a first face of said microelectronic element, wherein an outer region of said flexible substrate extends beyond the outer perimeter of said microelectronic element;

a plurality of etched conductive posts having tips exposed at a surface of said flexible substrate and being electrically interconnected with said microelectronic element, wherein at least one of said conductive posts is disposed in the outer region of said flexible substrate;

a compliant layer disposed between the first face of said microelectronic element and said flexible substrate, wherein said compliant layer overlies the at least one of said conductive posts that is disposed in the outer region of said flexible substrate, said compliant layer permitting movement of said conductive posts independently of each other in a direction relative to said microelectronic element; and

an encapsulating mold material serving as a rigid protective layer in contact with and covering said microelectronic element and said compliant layer,

wherein said flexible substrate extends beyond the outer edge of said compliant layer to define a gap, and said encapsulating mold material overlies the outer region of said flexible substrate and fills the gap,

such that pressing said plurality of conductive posts towards corresponding conductive elements of an external element establishes conductive contact between said tips of said plurality of conductive posts and said corresponding conductive elements by deforming said compliant layer to accommodate at least one of a difference in a height of said tips or a difference in a height of said corresponding conductive elements.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2005
From: HABA, BELGACEM; BEROZ, MASUD; KANG, TECK-GYU; KUBOTA, YOICHI; KRISHNAN, SRIDHAR; RILEY, JOHN B. III; MOHAMMED, ILYAS
To: TESSERA, INC.
Reel/Frame 016717/0155 →
Continuity (3)
Provisional Application 6058306600 · Jun 25, 2004
Provisional Application 6062186500 · Oct 25, 2004
Related Publication 20050285246A1 · Dec 29, 2005