IP Library › Granted Patent US 7,489,310
Granted Patent B2
US 7,489,310 · App. 11/044,041 · Granted Feb 10, 2009

Supply of a programming current to a pixel

Assignee: Seiko Epson Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,489,310
App. No.
11/044,041
Granted
Feb 10, 2009
Kind
B2
Abstract

A data line drive circuit is equipped with a single line driver and a gate voltage generation circuit. The single line driver is constructed such that N groups (where N is an integer 2 or larger) of series connections of drive transistors and switching transistors are connected in parallel. The gate voltage generation circuit includes two transistors constituting a current mirror circuit, a drive transistor, and a constant voltage generation transistor. The range of an output current I out can be controlled by changing any of the design values of the parameters including: relative values K a and K b of the gain coefficient for the transistors, the source voltage VDREF of the gate voltage generation circuit, and the gate signal VRIN of the drive transistor.

Claims (31)

1. A current generation circuit comprising:

constant current generation means;

a signal input line;

an output terminal;

a current output circuit for outputting to the output terminal an output current generated based on a reference current supplied from the constant current generation means and on a signal supplied to the signal input line,

the current output circuit including a plurality of first transistors having different gain coefficients; and

a first resistance adding circuit, disposed between the output terminal and the plurality of first transistors, with respect to at least one of the plurality of first transistors.

2. The current generation circuit according to claim 1 , wherein the current output circuit generates the output current by synthesizing current flowing in one or more transistors selected from the plurality of first transistors by the signal to the signal input line.

3. The current generation circuit according to claim 1 , wherein the constant current generation circuit includes a second transistor connected to a gate electrode of the first transistor.

4. The current generation circuit according to claim 3 , wherein the second transistor has a function of converting the reference current to a gate voltage at the plurality of first transistors.

5. The current generation circuit according to claim 3 , wherein the first resistance adding circuit is a third transistor.

6. The current generation circuit according to claim 5 , wherein the constant current generation circuit includes a fourth transistor connected to a gate electrode of the third transistor.

7. The current generation circuit according to claim 3 , wherein the current output circuit includes an offset current path for regulating a minimum value of the output current, and the offset current path has a fifth transistor whose gate electrode is connected to the second transistor.

8. The current generation circuit according to claim 7 , further comprising a second resistance adding circuit disposed between the output terminal and the fifth transistor.

9. The current generation circuit according to claim 8 , wherein the second resistance adding circuit is a sixth transistor.

10. The current generation circuit according to claim 7 , wherein the output current is adjusted by variation of a gain coefficient of the fifth transistor.

11. A semiconductor integrated circuit device, comprising the current generation circuit according to claim 1 .

12. A current generation circuit comprising:

a constant current generation circuit;

a signal input line;

an output terminal; and

a current output circuit for outputting to the output terminal an output current generated based on a reference current supplied from the constant current generation circuit and on a signal supplied to the signal input line,

wherein the current output circuit includes an offset current path for regulating a minimum value of the output current.

13. A semiconductor integrated circuit device, comprising the current generation circuit according to claim 12 .

14. A current generation circuit comprising:

a constant current generation circuit;

a signal input line;

an output terminal; and

a current output circuit for outputting to the output terminal an output current generated based on a reference current supplied from the constant current generation circuit and on a signal supplied to the signal input line,

wherein the reference current is set to a value close to a center value of minimum and maximum values of the output current.

15. A semiconductor integrated circuit device, comprising the current generation circuit according to claim 14 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2013
From: SEIKO EPSON CORPORATION
To: INTELLECTUAL KEYSTONE TECHNOLOGY LLC
Reel/Frame 030321/0510 →
Priority Claims (2)
JP 2001-235394 · Aug 2, 2001 · national
JP 2001-372996 · Dec 6, 2001 · national
Continuity (2)
Division 1020710000 · Jul 30, 2002
Related Publication 20050127845A1 · Jun 16, 2005