Method of collector formation in BiCMOS technology
View Patent ↗A heterobipolar transistor (HBT) for high-speed BiCMOS applications is provided in which the collector resistance, Rc, is lowered by providing a buried refractory metal silicide layer underneath the shallow trench isolation region on the subcollector of the device. Specifically, the HBT of the present invention includes a substrate including at least a subcollector; a buried refractory metal silicide layer located on the subcollector; and a shallow trench isolation region located on a surface of the buried refractory metal silicide layer. The present invention also provides a method of fabricating such a HBT. The method includes forming a buried refractory metal silicide underneath the shallow trench isolation region on the subcollector of the device.
1. A heterobipolar transistor (HBT) comprising:
a substrate including at least a semiconductor portion and a subcollector, wherein said semiconductor portion comprises a semiconductor material, said subcollector comprises said semiconductor material and a dopant, and said subcollector is located directly on and above said semiconductor portion;
a buried refractory metal silicide layer abutting and located directly on and above said subcollector; and
a shallow trench isolation region vertically abutting a surface of said buried refractory metal silicide layer.
2. The HBT of claim 1 wherein said substrate comprises a semiconductor substrate selected from the group consisting of Si, SiGe, SiC, SiGeC, GaAs, InAs, InP, silicon-on-insulators, silicon germanium-on-insulators, and other III/V or II/VI compound semiconductors.
3. The HBT of claim 2 wherein said semiconductor substrate is Si-containing.
4. The HBT of claim 1 wherein said subcollector is doped with C.
5. The HBT of claim 1 , further comprising:
a trench located in said substrate; and
a nitride or oxynitride spacer located on a sidewall of said trench and in said substrate, wherein said shallow trench isolation region and said buried refractory metal silicide layer are vertically stacked within said trench and laterally surrounded by said nitride or oxynitride spacer.
6. The HBT of claim 1 wherein said refractory metal silicide layer comprises a silicide of Ti, Co, W, Ta, Ni or alloys thereof
7. The HBT of claim 6 wherein said refractory metal silicide layer comprises a silicide of Co, Ta or W.
8. The HBT of claim 7 wherein said refractory metal silicide layer comprises a silicide of W.
9. The HBT of claim 1 wherein said shallow trench isolation region comprises a trench dielectric material.
10. A heterobipolar transistor (HBT) comprising:
a substrate including at least a semiconductor portion and a subcollector, wherein said semiconductor portion comprises a semiconductor material, said subcollector comprises said semiconductor material and a dopant, and said subcollector is located directly on and above said semiconductor portion;
a buried refractory metal silicide layer abutting and located directly on and above said subcollector; and
a shallow trench isolation region abutting a surface of said buried refractory metal silicide layer and located above said semiconductor portion.
11. The HBT of claim 10 , further comprising a nitride or oxide spacer laterally abutting and located above said buried refractory metal silicide layer.
12. The HBT of claim 11 , wherein said nitride or oxide spacer vertically abuts said subcollector.
13. The HBT of claim 11 , further comprising a ring-shaped oxide portion laterally abutting an outer sidewall of said nitride or oxide spacer and located within said substrate.
14. The HBT of claim 13 , wherein an inner sidewall of said ring-shaped oxide portion laterally abuts outer sidewalls of said buried refractory metal silicide layer.
15. The HBT of claim 14 , wherein another inner sidewall of said ring-shaped oxide portion laterally abuts said outer sidewall of said nitride or oxide spacer, and wherein a horizontal step on a surface of said ring-shaped oxide portion vertically between said inner sidewall and said another sidewall vertically abuts said buried refractory metal silicide layer.
16. The HBT of claim 10 , further comprising another shallow trench isolation region not abutting said shallow trench isolation region and located above said semiconductor portion and within said substrate.
17. The HBT of claim 10 , wherein said shallow trench isolation region vertically abuts a surface of said buried refractory metal silicide layer.
18. A heterobipolar transistor (HBT) comprising:
a substrate including at least a semiconductor portion and a subcollector, wherein said semiconductor portion comprises a semiconductor material, said subcollector comprises said semiconductor material and a dopant, and said subcollector is located directly on and above said semiconductor portion;
a buried refractory metal silicide layer abutting and located directly on and above said subcollector;
a shallow trench isolation region abutting a surface of said buried refractory metal silicide layer; and
a nitride or oxide spacer laterally abutting and located above said buried refractory metal silicide layer.
19. The HBT of claim 18 , wherein said shallow trench isolation region vertically abuts a surface of said buried refractory metal silicide layer.
20. The HBT of claim 19 , further comprising another shallow trench isolation region not abutting said shallow trench isolation region and located above said semiconductor portion and within said substrate.