IP Library Granted Patent US 7,510,967
Granted Patent B2
US 7,510,967 · App. 11/802,841 · Granted Mar 31, 2009

Method for manufacturing semiconductor device

Assignee: NEC Electronics Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,510,967
App. No.
11/802,841
Granted
Mar 31, 2009
Kind
B2
Abstract

The present invention relates to a method for manufacturing a semiconductor device, comprising: forming a metal interconnect on a substrate; forming a refractory metal layer containing titanium (Ti) or tantalum (Ta) on a surface of the metal interconnect; forming an insulating interlayer so as to cover the refractory metal layer; selectively etching the insulating interlayer with an etchant gas containing an organic fluoride to form a hole, in which the refractory metal layer is exposed; treating an interior of the hole with an organic chemical solution to remove fluorinated compounds of Ti or Ta while leaving fluorocarbons on the surface of the refractory metal layer, the fluorinated compounds of Ti or Ta and the fluorocarbons being created during the etching step and present in the interior of the hole; and performing plasma-treatment for the interior of said hole to remove the fluorocarbon.

Claims (12)

1. A method for manufacturing a semiconductor device, comprising:

forming a metal interconnect on a substrate;

forming a refractory metal layer containing titanium (Ti) or tantalum (Ta) on a surface of said metal interconnect;

forming an insulating interlayer so as to cover said refractory metal layer;

selectively etching said insulating interlayer with an etchant gas containing an organic fluoride to form a hole, in which the said refractory metal layer is exposed;

treating an interior of said hole with an organic chemical solution to remove fluorinated compounds of Ti or Ta while leaving fluorocarbons on the surface of said refractory metal layer, said fluorinated compounds of Ti or Ta and said fluorocarbons being generated during said etching step and present in the interior of said hole; and

performing plasma-treatment for the interior of said hole to remove the fluorocarbon.

2. The method for manufacturing the semiconductor device according to claim 1 , further comprising forming an electrically conducting film in said hole to form a coupling plug that is coupled to said metal interconnect.

3. The method for manufacturing the semiconductor device according to claim 1 , wherein said refractory metal layer is a Ti-containing layer, said organic chemical solution is capable of removing a fluorinated compound of Ti, and said organic chemical solution is lower in a removing rate of fluorocarbon than said fluorinated compound of Ti.

4. The method for manufacturing the semiconductor device according to claim 1 , wherein said organic chemical solution contain substantially no water.

5. The method for manufacturing the semiconductor device according to claim 1 , wherein said organic chemical solution is propylene glycol monomethyl ether acetate (PGMEA).

6. The method for manufacturing the semiconductor device according to claim 1 , wherein said organic chemical solution is butyl acetate.

Assignments (2)
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0456 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2007
From: USHIJIMA, KOUSEI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 019397/0806 →
Priority Claims (1)
JP 2006-147731 · May 29, 2006 · national
Continuity (1)
Related Publication 20070275558A1 · Nov 29, 2007