IP Library Granted Patent US 7,528,039
Granted Patent B2
US 7,528,039 · App. 12/021,181 · Granted May 5, 2009

Method of fabricating flash memory

Assignee: Poongsan Microtec Co., Ltd.
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Quick Facts
Patent No.
US 7,528,039
App. No.
12/021,181
Granted
May 5, 2009
Kind
B2
Abstract

A method of fabricating a flash memory is provided. The method includes forming a tunneling insulating film, a charge storage film, and a blocking insulating film on a semiconductor substrate; performing High Temperature (HT) anneal for the resultant semiconductor substrate; and performing Low Temperature (LT) wet vapor anneal for the resultant semiconductor substrate.

Claims (15)

1. A method of fabricating a flash memory, comprising:

forming a tunneling insulating film on a semiconductor substrate;

forming a charge storage film on the tunneling insulating film;

forming a blocking insulating film on the charge storage film;

performing High Temperature (HT) anneal for the semiconductor substrate comprising the blocking insulating film; and

performing Low Temperature (LT) wet vapor anneal for the semiconductor substrate for which the HT anneal is performed,

wherein the LT wet vapor anneal is performed under an atmosphere of 2 to 100 atmospheric pressure, cures oxygen defects of the blocking insulating film, and uses vapor to cure interfacial defects.

2. The method of claim 1 , wherein the LT wet vapor anneal is performed at a temperature of 200° C. to 600° C.

3. The method of claim 2 , wherein the LT wet vapor anneal supplies vapor to an atmosphere of inertia gas of nitrogen (N) or argon (Ar).

4. The method of claim 3 , wherein the LT wet vapor anneal is performed at a temperature of 250° C. under an atmosphere comprising nitrogen of 10 atmospheric pressure and vapor of 2 atmospheric pressure.

5. The method of claim 1 , wherein the blocking insulating film is of materials comprising Al 2 O 3 , HfO 2 , ZrO 2 , Ta 2 O 5 , TiO 2 , or YO 2 as high-k dielectric materials having a high dielectric constant or is of hafnium (Hf) silicate, zirconium (Zr) silicate, yttrium (Y) silicate, or lanthanide (Ln) series metal silicate.

6. The method of claim 1 , further comprising: after the LT wet vapor anneal,

forming a control gate film on the blocking insulating film; and

forming an etching mask on the control gate film and forming a gate pattern by etching.

7. The method of claim 6 , wherein the control gate film is of titanium (Ti), tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), or polycrystalline silicon.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2017
From: POONGSAN CORPORATION
To: HPSP CO., LTD.
Reel/Frame 042882/0983 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2015
From: PSMC
To: POONGSAN CORPORATION
Reel/Frame 037036/0958 →
CHANGE OF NAME Recorded Aug 27, 2015
From: POONGSAN MICROTEC CO., LTD.
To: PSMC
Reel/Frame 036501/0099 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2008
From: HWANG, HYUN-SANG; PARK, HO-KYUNG; JANG, MAN; JO, MIN-SEOK
To: POONGSAN MICROTEC CO., LTD.
Reel/Frame 020425/0973 →
Continuity (1)
Related Publication 20080166865A1 · Jul 10, 2008