IP Library › Granted Patent US 7,537,870
Granted Patent B2
US 7,537,870 · App. 11/452,865 · Granted May 26, 2009

Lithography process optimization and system

Assignees: Chartered Semiconductor Manufacturing, Ltd.; International Business Machines Corporation
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Quick Facts
Patent No.
US 7,537,870
App. No.
11/452,865
Granted
May 26, 2009
Kind
B2
Abstract

The first and second example embodiments are Pattern Fidelity Optimization Procedures for a Multiple Exposure Scheme. In the third example embodiment, the aperatures from the multiple exposure system can be combined into a single aperture by adding the apertures and modulating the relative transmission thru the respective apertures to match the prescribed dose split determined in above in the first embodiment.

Claims (46)

1. A method for fabricating a device comprising:

providing a substrate prepared with photoresist;

providing a photomask comprising first and second mask pattern types;

providing a composite aperture comprising first and second aperture patterns the first aperture pattern improves performance of a first pattern fidelity parameter for the first mask pattern type and the second aperture pattern to improve the performance of a second pattern fidelity parameter for the second mask pattern type;

exposing the photoresist on the substrate with radiation from an exposure source through the composite aperture and photomask;

modulating the radiation from the exposure source during exposing to control radiation dose from at least one of the first and second aperture patterns; and

developing the photoresist to pattern the photoresist.

2. The method of claim 1 wherein:

the first pattern type is a nested feature; and

the second pattern type comprises an isolated contact.

3. The method of claim 1 wherein:

the first type pattern comprises Line/space features; and

the second type pattern comprises contact holes.

4. The method of claim 1 wherein:

the first and second pattern fidelity parameters comprise at least one of depth of focus, critical dimension (CD), mask error enhancement factor (MEEF), amount of line-end pullback, process window, common process window, necking, bridging, resist collapse, dose-to-size E1:1, dense to isolated feature bias, arbitrary feature size bias, sidelobe printing, film loss, sidewall angle, resolution; or weighted combinations thereof or weighted combinations of ranges thereof.

5. The method of claim 1 wherein modulating the radiation comprises a modulator.

6. The method of claim 5 wherein the modulator is disposed between the composite aperture and photomask.

7. The method of claim 5 wherein the modulator comprises a grey filter.

8. The method of claim 7 wherein the modulator is disposed between the composite aperture and photomask.

9. The method of claim 1 wherein modulating the radiation from the exposure source during exposing to control radiation dose from the first and second aperture patterns.

10. The method of claim 9 wherein modulating the radiation comprises a modulator disposed between the composite aperture and photomask.

11. The method of claim 1 wherein:

during the step of exposing the photoresist, a total exposure energy transmitted to the photoresist comprises a first dose transmitted via the first aperture pattern and a second dose transmitted via the second aperture pattern; and

the first and second dose is selected based on the performance of a first feature type in the first pattern type and a second feature type in the second pattern type.

12. The method of claim 1 wherein the device comprises a semiconductor device.

13. A method for fabricating a device comprising:

providing a substrate prepared with photoresist;

providing a photomask comprising first and second mask pattern types;

providing a composite aperture comprising first and second aperture patterns, the first aperture pattern improves performance of a first pattern fidelity parameter for the first mask pattern type and the second aperture pattern to improve the performance of a second pattern fidelity parameter for the second mask pattern type;

exposing the photoresist on the substrate with radiation from an exposure source through the composite aperture and photomask; and

developing the photoresist to pattern the photoresist.

14. The method of claim 13 comprises modulating the radiation from the exposure source during exposing to control radiation dose from at least one of the first and second aperture patterns.

15. The method of claim 14 wherein modulating the radiation comprises a modulator disposed between the composite aperture and photomask.

16. The method of claim 13 comprises modulating the radiation from the exposure source during exposing to control radiation dose from the first and second aperture patterns.

17. The method of claim 13 wherein the device comprises a semiconductor device.

18. A method for fabricating a semiconductor device comprising:

providing a substrate prepared with photoresist;

providing a photomask comprising first and second mask pattern types;

providing a composite aperture comprising first and second aperture patterns, the first aperture pattern improves performance of a first pattern fidelity parameter for the first mask pattern type and the second aperture pattern to improve the performance of a second pattern fidelity parameter for the second mask pattern type;

exposing the photoresist on the substrate with radiation from an exposure source through the composite aperture and photomask;

modulating the radiation from the exposure source during exposing to control radiation dose from the first and second aperture patterns; and

developing the photoresist to pattern the photoresist.

19. The method of claim 18 wherein modulating comprises a modulator.

20. The method of claim 18 , wherein:

during the step of exposing the photoresist, a total exposure energy transmitted to the photoresist comprises a first dose transmitted via the first aperture pattern and a second dose transmitted via the second aperture pattern; and

the first and second dose is selected based on the performance of a first feature type in the first pattern type and a second feature type in the second pattern type.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2006
From: CROUSE, MICHAEL MATTHEW
To: INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM)
Reel/Frame 017976/0930 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2006
From: YUDHISTIRA, YASRI
To: CHARTERED SEMICONDUCTOR MANUFACTURING LTD
Reel/Frame 018000/0424 →
Continuity (3)
Provisional Application 6077438200 · Feb 17, 2006
Provisional Application 6070620200 · Aug 5, 2005
Related Publication 20070031744A1 · Feb 8, 2007