Digital predistortion apparatus and method in power amplifier

1. A digital predistortion apparatus for compensating by predistorting a nonlinear characteristic caused by a power amplifier that amplifies an input signal, the apparatus comprising:

a predistorter, electrically connected to the power amplifier via a digital-to-analog converter (DAC), for receiving the input signal and compensating for the nonlinear characteristic using a look-up table that depends upon a change in output power of the power amplifier; and

a look-up table (LUT) updating block, electrically connected to the predistorter, for comparing a feed-back signal outputted from the power amplifier with a first signal outputted from the predistorter, and adaptively updating the look-up table using the compared result,

wherein the LUT updating block comprises:

a delay unit for calculating a time delay between the first signal and the feed-back signal, delaying the first signal by the calculated time delay, and providing the delayed first signal to an adaptation controller;

the adaptation controller for updating a polynomial coefficient converged to reduce a difference between an output value and a target value; and

an LUT converter for converting the polynomial coefficient converged in the adaptation controller into a look-up table to update the look-up table.

2. The digital predistortion apparatus of claim 1 , wherein the predistorter comprises:

a look-up table converged at a specific power value;

an address decider for calculating an intensity of the input signal and determining an address of the look-up table according to a change in output power of the power amplifier; and

a multiplier for multiplying the input signal by a value read from the look-up table using the determined address.

3. The digital predistortion apparatus of claim 2 , wherein the address decider comprises:

a controller including a table in which an output power is matched to a coefficient value for selecting a look-up table corresponding to the output power, wherein the controller is programmable to output a coefficient to which a value for changing the output power is mapped;

squarers for individually squaring a real-part signal and an imaginary-part signal, wherein the real-part signal and the imaginary-part signal are obtained by dividing the input signal;

an adder for adding signals outputted from the squarers;

a first multiplier for dividing the added signal by an LUT step size; and

a second multiplier for multiplying a signal outputted from the first multiplier by the coefficient value.

4. A digital predistortion method for predistorting a nonlinear characteristic caused by a power amplifier that amplifies an input signal, the method comprising the steps of:

calculating a time delay between a first signal outputted from the predistorter and a feedback signal outputted from the power amplifier;

delaying the first signal by the calculated time delay, and providing the delayed first signal to an adaptation controller;

updating a polynomial coefficient converged to reduce a difference between an output value and a target value; and

converting the polynomial coefficient converged in the adaptation controller into a look-up to update the look-up table.

5. A digital predistortion apparatus for compensating by predistorting a nonlinear characteristic caused by a power amplifier that amplifies an input signal, the apparatus comprising:

a predistorter, electrically connected to the power amplifier via a digital-to-analog converter (DAC), for receiving the input signal and compensating for the nonlinear characteristic using a data storage device that depends upon a change in output power of the power amplifier; and

a data storage device updating block, electrically connected to the predistorter;

wherein the data storage device updating block comprises:

a delay unit for calculating a time delay between a first signal outputted from the predistorter and a feedback signal outputted from the power amplifier, delaying the first signal by the calculated time delay, and providing the delayed first signal to an adaptation controller;

the adaptation controller for updating a polynomial coefficient converged to reduce a difference between an output value and a target value; and

a data storage device converter for converting the polynomial coefficient converged in the adaptation controller to update the data storage device.

6. The digital predistortion apparatus of claim 5 , wherein the predistorter comprises:

a data storage device converged at a specific power value;

an address decider for calculating an intensity of the input signal and determining an address of the data storage device according to a change in output power of the power amplifier; and

a multiplier for multiplying the input signal by a value read from the data storage device using the calculated address.

7. The digital predistortion apparatus of claim 6 , wherein the address decider comprises:

a controller including a table in which an output power is matched to a coefficient value for selecting a data storage device corresponding to the output power, wherein the controller is programmable to output a coefficient to which a value for changing the output power is mapped;

squarers for individually squaring a real-part signal and an imaginary-part signal, wherein the real-part signal and the imaginary-part signal are obtained by dividing the input signal;

an adder for adding signals outputted from the squarers;

a first multiplier for dividing the added signal by a step size; and

a second multiplier for multiplying a signal outputted from the first multiplier by the coefficient value.