Continuous time delta-sigma modulator and electronic circuit including the same

1. An electronic circuit comprising:

an active integrator including an operational amplifier, the operational amplifier having a first input terminal that receives a summed signal of an input signal and an analog feedback signal, and a second input terminal that receives a reference voltage; and

a digital to analog converter (DAC) that converts a digital output of the electronic circuit to an analog signal and provides the analog feedback signal, the DAC comprising:

a coupling capacitor;

first switches that respectively connect first and second terminals of the coupling capacitor to the reference voltage, in response to a first control signal;

at least one current source that generates a current, the current being constant when a voltage difference of two terminals of the current source is greater than a reference value, and the current decreasing when the voltage difference of the two terminals is smaller than the reference value;

second switches that selectively connect the second terminal of the coupling capacitor to the current source, in response to a second control signal and the digital output, the second control signal having a non overlapping active period with respect to the first control signal; and

a third switch that connects the first terminal of the coupling capacitor to the first input terminal of the operational amplifier, in response to the second control signal,

the current source generating the current such that a first time point when the voltage difference is smaller than the reference value is earlier than a second time point when the second control signal is deactivated.

2. The electronic circuit of claim 1 , wherein the current source comprises a metal oxide semiconductor (MOS) transistor that is biased by a gate-source voltage equal to or greater than a threshold voltage, and the current is generated based on a drain current of the MOS transistor.

3. The electronic circuit of claim 2 , wherein the voltage difference corresponds to a drain-source voltage of the MOS transistor.

4. The electronic circuit of claim 1 , further comprising an input resistor that connects the input signal and the first input terminal of the operational amplifier.

5. The electronic circuit of claim 1 , wherein the input signal and the analog feedback signal correspond to a difference signal.

6. The electronic circuit of claim 1 , further comprising a self-calibration circuit that compensates errors generated in a manufacturing process of the current source.

7. The electronic circuit of claim 1 , further comprising an auto-tuning circuit that compensates errors generated in a manufacturing process of the coupling capacitor.

8. An electronic circuit comprising:

a coupling capacitor;

first switches that respectively connect first and second terminals of the coupling capacitor to a reference voltage, in response to a first control signal;

at least one current source that generates a current, the current being constant when a voltage difference of two terminals of the current source is greater than a reference value, and the current decreasing when the voltage difference of the two terminals is smaller than the reference value;

second switches that selectively connect the second terminal of the coupling capacitor to the current source, in response to a second control signal and the digital output of the electronic circuit, the second control signal having a non-overlapping active period with respect to the first control signal;

an operational amplifier having first and second input terminals, the second input terminal being coupled to the reference voltage; and

a third switch that connects the first terminal of the coupling capacitor to the first input terminal of the operational amplifier, in response to the second control signal,

the current source generating the current such that a first time point when the voltage difference is smaller than the reference value is earlier than a second lime point when the second control signal is deactivated.

9. The electronic circuit of claim 8 , wherein the current source comprises a metal oxide semiconductor (MOS) transistor that is biased by a gate-source voltage equal to or greater than a threshold voltage, and the current is generated based on a drain current of the MOS transistor.

10. The electronic circuit of claim 9 , wherein the voltage difference corresponds to a drain-source voltage of the MOS transistor.

11. The electronic circuit of claim 8 , further comprising an input resistor that connects the input signal and the first input terminal of the operational amplifier.

12. The electronic circuit of claim 8 , wherein the input signal and the analog feedback signal correspond to a difference signal.

13. The electronic circuit of claim 8 , further comprising a self-calibration circuit that compensates errors generated in a manufacturing process of the current source.

14. The electronic circuit of claim 8 , further comprising an auto-tuning circuit that compensates errors generated in a manufacturing process of the coupling capacitor.

15. A continuous time delta sigma modulator (CTDSM) comprising:

an active integrator including an operational amplifier, the operational amplifier having a first input terminal that receives a summed signal of an input signal and an analog feedback signal, and a second input terminal that receives a reference voltage;

a quantizer that generates a digital output based on an output of the active integrator; and

a digital to analog converter (DAC) that converts the digital output to the analog feedback signal, the DAC comprising:

a coupling capacitor;

first switches that respectively connect first and second terminals of the coupling capacitor to the reference voltage, in response to a first control signal;

at least one current source that generates a current, the current being constant when a voltage difference of two terminals of the current source is greater than a reference value, and the current decreasing when the voltage difference of the two terminals is smaller than the reference value;

second switches that selectively connect the second terminal of the coupling capacitor to the current source, in response to a second control signal and the digital output, the second control signal having a non overlapping active period with respect to the first control signal; and

a third switch that connects the first terminal of the coupling capacitor to the first input terminal of the operational amplifier, in response to the second control signal,

the current source generating the current such that a first time point when the voltage difference is smaller than the reference value is earlier than a second time point when the second control signal is deactivated.

16. The CTDSM of claim 15 , wherein the current source comprises a metal oxide semiconductor (MOS) transistor that is biased by a gate-source voltage equal to or greater than a threshold voltage, and the current is generated based on a drain current of the MOS transistor.

17. The CTDSM of claim 16 , wherein the voltage difference corresponds to a drain-source voltage of the MOS transistor.

18. The CTDSM of claim 15 , further comprising an input resistor that connects the input signal and the first input terminal of the operational amplifier.

19. The CTDSM of claim 15 , wherein the input signal and the analog feedback signal correspond to a difference signal.

20. The CTDSM of claim 15 , further comprising a self-calibration circuit that compensates errors generated in a manufacturing process of the current source.

21. The CTDSM of claim 15 , further comprising an auto-tuning circuit that compensates errors generated in a manufacturing process of the coupling capacitor.