Semiconductor device and manufacturing method thereof
A semiconductor chip 11 comprising an element formation layer which is formed on a first main surface 35 A of a semiconductor substrate 35 and has a semiconductor element, through electrodes 15, 16 which are electrically connected to the semiconductor element and extend through the semiconductor chip 11 , and a patch antenna 33 formed on the side of a second main surface 35 B of the semiconductor substrate 35 are disposed, and the patch antenna 33 is electrically connected to the through electrode 15 electrically connected to a line for power feeding of the semiconductor element.
1. A semiconductor device comprising:
a semiconductor chip comprising a semiconductor substrate and an element formation layer which is formed on a first main surface of said semiconductor substrate and has a semiconductor element; and
a passive circuit electrically connected to the semiconductor element,
wherein the passive circuit is disposed on the side of a second main surface opposite to the first main surface of the semiconductor substrate and the passive circuit is electrically connected to the semiconductor element by a through electrode passing through the semiconductor chip, and
wherein the passive circuit is a patch antenna or an inverted F-type antenna.
2. The semiconductor device as claimed in claim 1 , further comprising:
a ground layer disposed on the second main surface of the semiconductor substrate; and
a first insulating layer for covering said ground layer,
wherein the through electrode has a first through electrode electrically connected to the ground layer and a second through electrode electrically connected to a power feeding line of the semiconductor element.
3. The semiconductor device as claimed in claim 1 , wherein the passive circuit is electrically connected to the second through electrode when the passive circuit is a patch antenna.
4. The semiconductor device as claimed in claim 1 , wherein the passive circuit is electrically connected to the first and second through electrodes when the passive circuit is an inverted F-type antenna.
5. The semiconductor device as in claim 1 , further comprising:
a second insulating layer disposed on the element formation layer; and
an external connection terminal disposed on said second insulating layer,
wherein a wiring pattern for making electrical connection between the external connection terminal and the first and second through electrodes is disposed in the second insulating layer.