Apparatus and method for multi-phase digital sampling

1. A method of determining a relationship between an input signal frequency and a reference signal frequency, the reference frequency having a first period, the method comprising:

deriving from the reference signal a plurality of internal reference signals, each of the internal reference signals characterized with each of the internal reference signals being temporally offset from one another and occurring within the first period;

providing each of the plurality of internal reference signals to a level detection circuit;

based upon a characteristic of any of the plurality of internal reference signals, sampling, with the level detection circuit, a plurality of signal levels of the input signal within the first period;

providing an output of the level detection circuit to a time alignment circuit, the time alignment circuit being configured to produce an output which is a time-aligned version of the output of the level detection circuit;

storing a value indicative of each of the sampled levels taken in the first period;

storing one value indicative of a sampled level of the input signal from a previous period;

correlating the sampled levels from the first period amongst themselves;

correlating the one value indicative of a sampled level from the first period with the value indicative of a sampled level from the previous period; and

deriving a relationship between the input signal frequency and the reference signal frequency based in part on: a) the step of correlating the sampled signal levels from the first period; and b) the step of correlating the one value indicative of the sampled level from the first period with the value indicative of the sampled level from the previous period.

2. A circuit for determining a relationship between an input signal having a first frequency on an input port and a reference signal having a second frequency on a reference port comprising:

an internal timing signal generator, coupled to the reference port, operable to generate multiple signals at specific points in time within a first period of time, the first period of time related to the reference signal frequency;

a plurality of signal level detectors, each of the plurality of signal level detectors coupled to an output of the internal timing signal generator and the input port and having a first output, each of the signal level detectors operable to sample the input signal at a first point in time based upon an output of the internal timing signal generator and output a first value associated with the sampled input signal, the first point in time being within the first period;

a time alignment circuit, coupled to the plurality of signal level detectors, configured to produce a plurality of outputs which are a time-aligned version of outputs of the plurality of the signal level detectors;

a storage circuit, operable to store a value associated with a sampled input signal from a second point in time, the second point in time being previous to the first period; and

a correlator circuit, coupled to the time alignment circuit and the storage circuit, operable to: a) correlate the first values from the first period amongst themselves; and b) correlate the value associated with a sampled input signal from the second point in time with one of the first values.

3. A circuit for determining a relationship between an input signal having a first frequency on an input port and reference signal having a second frequency on a reference port, the circuit comprising:

a signal offset circuit, coupled to the reference port, for generating a plurality of offset reference signals on a plurality of ports, the offset reference signals subdividing a first period of time, the first period of time related to the second frequency;

a plurality of signal detection circuits, each coupled to one of the plurality of reference offset ports, each operable to sample the input signal at a particular point in response to a particular offset reference signal and produce a first signal associated with the level of the input signal at the particular point in time;

a time alignment circuit, coupled to the plurality of signal detection circuits, configured to produce a plurality of outputs which are a time-aligned version of outputs of the plurality of the signal detection circuits;

a plurality of storage circuits, each coupled to an associated one of the plurality of signal detection circuits, each operable to store the first signal from the associated signal detector circuit;

a carryover circuit, operable to store a first signal from one of the plurality of storage circuits associated with a second time, the second time being previous to the first period;

a plurality of first transition detection circuits, each coupled to a pair of storage circuits from among the plurality of storage circuits, each operable to detect a change between the stored first signals in the pair of storage circuits;

a second transition detection circuit, coupled to a particular first storage circuit from the plurality of storage circuits and to the carryover circuit, operable to detect a change between the stored first signal in the first storage circuit and the stored signal in the carryover circuit;

a transition aggregation circuit, coupled to the plurality of first transition detection circuits and to the second transition detection circuit, operable to produce a signal related to the number of changes in the stored signals; and

a digital filter, coupled to the transition aggregation circuit, operable to produce an average of the number of transitions over a history of periods.

4. The method of claim 1 , wherein the time alignment circuit is further configured to be clocked by two different mechanisms.

5. The circuit of claim 2 , wherein the time alignment circuit is further configured to be clocked by two different mechanisms.

6. The circuit of claim 3 , wherein the time alignment circuit is further configured to be clocked by two different mechanisms.