IP Library › Granted Patent US 7,592,272
Granted Patent B2
US 7,592,272 · App. 11/692,620 · Granted Sep 22, 2009

Manufacturing method of semiconductor integrated circuit

Assignee: Hitachi, Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,592,272
App. No.
11/692,620
Granted
Sep 22, 2009
Kind
B2
Abstract

An object of the present invention is to provide a method of depositing yttrium-stabilized hafnia use for a DRAM capacitor insulating film while controlling the composition at a high accuracy by an atomic layer deposition method. The atomic deposition method is performed by introducing a hafnium compound precursor, introducing a yttrium compound precursor and introducing an oxidant as one cycle. In the atomic deposition method, the addition amount of yttrium into hafnia is controlled accurately by controlling the time of introducing the hafnium compound precursor and the yttrium compound precursor and controlling the replacement ratio of OH groups on a sample surface by each of the precursors.

Claims (18)

1. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate, wherein

the information storing capacitor has a lower electrode, an upper electrode, and an insulating film disposed between the lower electrode and the upper electrode,

the insulating film comprises a first element, a second element, and oxygen,

the insulating film is deposited by a method of alternately exposing a first precursor as a compound containing the first element, a second precursor as a compound containing the second element and an oxidant containing oxygen to a deposition surface, and

an adsorption ratio of the first precursor to a plurality of adsorption sites on the deposition surface is less than 100% in the step of exposing the first precursor to the deposition surface, leaving remaining adsorption sites for the second precursor and the second precursor is adsorbed to the remaining adsorption sites for the second precursor in the step of exposing the second precursor to the deposition surface.

2. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate according to claim 1 , wherein

the first element is at least one selected from a group consisting of yttrium, hafnium, aluminum, zirconium, lanthanum, niobium, tantalum, titanium, scandium and silicon, and

the second element is at least one selected from a group consisting of yttrium, hafnium, aluminum, zirconium, lanthanum, niobium, tantalum, titanium, scandium and silicon.

3. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate according to claim 1 , wherein

the oxidant is water, ozone, or hydrogen peroxide.

4. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate according to claim 1 , wherein

the content of the first element and the content of the second element in the deposited film are controlled by a replacement ratio on the adsorption sites of the deposition surface by the first precursor and the second precursor.

5. In a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate, wherein the information storing capacitor has a lower electrode, an upper electrode, and an insulating film disposed between the lower electrode and the upper electrode, wherein the insulating film is formed by a method comprising the steps of:

exposing a first precursor, as a compound containing a first element, toward a deposition surface, the first precursor being adsorbed to a first plurality of adsorption sites on the deposition surface;

exposing a second precursor, as a compound containing a second element, toward the deposition surface, the second precursor being adsorbed to a second plurality of adsorption sites on the deposition surface that are different from the first plurality of adsorption sites; and

exposing an oxidant containing oxygen to the deposition surface,

wherein the content of the first element and the content of the second element in the deposited film are controlled by a replacement ratio on the adsorption sites of the deposition surface by the first precursor and the second precursor.

6. A method of manufacturing a semiconductor integrated circuit device provided with a memory cell having an information storing capacitor formed above a semiconductor substrate according to claim 1 , wherein the insulating film is deposited by method of alternately exposing the first precursor as the compound containing the first element, the second precursor as the compound containing the second element and the oxidant containing oxygen to the deposition surface, such that the first precursor is first introduced, then exposed and then purged, and thereafter the second precursor is introduced, then exposed and then purged, and thereafter the oxidant is introduced, then exposed and then purged.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2007
From: TONOMURA, OSAMU
To: HITACHI, LTD.
Reel/Frame 019079/0122 →
Priority Claims (1)
JP 2006-091715 · Mar 29, 2006 · national
Continuity (1)
Related Publication 20070232501A1 · Oct 4, 2007