Semiconductor device with DRAM portion having capacitor-over-bit-line structure and logic portion
View Patent ↗The present invention provides a semiconductor device comprising: a semiconductor substrate having a DRAM portion and a Logic portion; a first transistor in said DRAM portion; a second transistor in said Logic portion; a first insulating layer covering said DRAM portion and said Logic portion; a first contact plug formed in said first insulating layer in electrically contact with said first transistor in said DRAM portion; a first bit line for said DRAM portion formed on said first insulating layer in electrically contact with said first contact plug; a nitride film formed in contact with said first insulating layer to cover said DRAM portion and said Logic portion, wherein said first bit line locating between said first insulating layer and said nitride film.
1. A semiconductor device comprising:
a semiconductor substrate having a DRAM portion and a Logic portion;
a first transistor formed in said DRAM portion;
a second transistor formed in said Logic portion;
a first insulating layer covering said DRAM portion and said Logic portion;
a first contact plug formed in said first insulating layer to electrically contact said first transistor in said DRAM portion;
an insulating interlayer for said DRAM portion selectively formed on one portion of said first insulating layer;
a first bit line for said DRAM portion formed on said insulating interlayer; and
a nitride film formed in contact with said first bit line, said insulating interlayer, and with another portion of said first insulating layer, said nitride film covering said Logic portion.
2. The semiconductor device according to claim 1 , further comprising:
a second contact plug formed in said first insulating layer in electrically contact with said second transistor in said Logic portion; and
a second bit line for said Logic portion formed over yet another portion of said first insulating layer to electrically contact said second contact plug; and
a second bit contact for said Logic portion between said second contact plug and said second bit line to electrically connect therebetween,
wherein said nitride film contacts said second bit line and said second bit contact.
3. The semiconductor device according to claim 1 , further comprising:
a second insulating layer covering said nitride film;
a third contact plug formed in said second insulating layer to electrically contact said first contact plug; and
a capacitor formed on said second insulating layer, a lower electrode of said capacitor contacting said third contact plug.
4. The semiconductor device of claim 1 , further comprising:
a third bit line and a first bit contact, said first bit contact being between said first contact plug and said third bit line to electrically connect therebetween,
wherein said nitride film is in contact with a top surface and a side surface of said third bit line and a side surface of said first bit contact.