IP Library Granted Patent US 7,622,963
Granted Patent B2
US 7,622,963 · App. 11/865,651 · Granted Nov 24, 2009

General purpose comparator with multiplexer inputs

Assignee: Silicon Laboratories Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,622,963
App. No.
11/865,651
Granted
Nov 24, 2009
Kind
B2
Abstract

A circuitry comprises a comparator for comparing a signal received on a first input to a signal received on a second input. A control register associated with the first multiplexer stores control values enabling connection of one input of the first multiplexer to the output of the first multiplexer.

Claims (32)

1. A comparator circuitry included within a single chip integrated circuit device, comprising:

a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode;

a first analog multiplexer having an output connected to the first input of the comparator;

a second analog multiplexer having an output connected to the second input of the comparator; and

at least one control register associated with the comparator, the first multiplexer and the second multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling the connection of one input of the first multiplexer and one input of the second multiplexer to the respective output of the first multiplexer and the second multiplexer and programming the response time level of the comparator.

2. The circuitry of claim 1 , wherein the input comprises at least two of a general purpose input/output pad, a ground connection, a supply voltage input, a boost converter output voltage input and a voltage regulator input.

3. The circuitry of claim 1 , wherein the input comprises a one of a plurality of reference voltage levels.

4. The circuitry of claim 1 , wherein the input comprises input from a capacitive touch switch array.

5. A comparator circuitry included within a single chip integrated circuit device, comprising:

a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode;

a first analog multiplexer having an output connected to the first input of the comparator; and

at least one control register associated with the comparator and the first multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling connection of one input of the first multiplexer to the output of the first multiplexer and programming the response time level of the comparator.

6. The circuitry of claim 5 , further including a second multiplexer having an output connected to the second input of the comparator.

7. The circuitry of claim 6 , wherein the control register further stores control values enabling connection of one input of the second multiplexer to the output of the second multiplexer.

8. The circuitry of claim 5 , wherein the input comprises at least two of a general purpose input/output pad, a ground connection, a supply voltage input, a boost converter output voltage input and a voltage regulator input.

9. The circuitry of claim 5 , wherein the input comprises a one of a plurality of reference voltage levels.

10. The circuitry of claim 5 , wherein the input comprises input from a capacitive touch switch array.

11. A comparator circuitry included within a single chip integrated circuit device, comprising:

a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode;

a first multiplexer having an output connected to the first input of the comparator and a plurality of inputs each connected to a different reference voltage; and

at least one control register associated with the comparator and the first multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling connection of one of the reference voltages to the output of the first multiplexer and programming the response time level of the comparator.

12. The circuitry of claim 11 , further including a second multiplexer having an output connected to the second input of the comparator.

13. The circuitry of claim 12 , wherein the control register further stores control values enabling connection of one input of the second multiplexer to the output of the second multiplexer.

14. The circuitry of claim 11 , wherein the input comprises at least two of a general purpose input/output pad, a ground connection, a supply voltage input, a boost converter output voltage input and a voltage regulator input.

15. A comparator circuitry included within a single chip integrated circuit device, comprising:

a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode;

a first multiplexer having an output connected to the first input of the comparator, at least one input of first multiplexer connected to a capacitive touch switch array; and

at least one control register associated with the comparator and the first multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling connection of one input of the first multiplexer to the output of the first multiplexer and programming the response time level of the comparator.

16. The circuitry of claim 15 , further including a second multiplexer having an output connected to the second input of the comparator.

17. The circuitry of claim 16 , wherein the control register further stores control values enabling connection of one input of the second multiplexer to the output of the second multiplexer.

18. The circuitry of claim 15 , wherein an additional at least one input further comprises at least two of a general purpose input/output pad, a ground connection, a supply voltage input, a boost converter output voltage input and a voltage regulator input.

19. The circuitry of claim 15 , wherein an additional at least input comprises at least one of a plurality of reference voltage levels.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2008
From: WESTWICK, ALAN L.
To: SILICON LABORATORIES INC.
Reel/Frame 020557/0198 →
Continuity (1)
Related Publication 20090085610A1 · Apr 2, 2009