Semiconductor device and manufacturing method thereof
View Patent ↗It has been difficult to manufacture a semiconductor device equipped with a microstructure having a space, an electric circuit for controlling the microstructure, and the like over one substrate. In a semiconductor device, a microstructure and an electric circuit for controlling the microstructure can be provided over one substrate by manufacturing the microstructure in such a way that a structural layer having polycrystalline silicon obtained by laser crystallization or thermal crystallization using a metal element is formed and processed at low temperature. As the electric circuit, a wireless communication circuit for carrying out wireless communication with an antenna is given.
1. A semiconductor device comprising:
a microstructure over an insulating surface, comprising a structural layer and a space between the structural layer and the insulating surface, wherein the structural layer comprises polycrystalline silicon having continuous grain boundaries;
an electric circuit comprising a semiconductor element over the insulating surface; and
an antenna over the microstructure and the electric circuit;
wherein the antenna and the microstructure are electrically connected to the electric circuit, respectively.
2. A semiconductor device according to claim 1 , wherein the structural layer is movable in the space.
3. A semiconductor device according to claim 1 , wherein the structural layer comprises polycrystalline silicon obtained by laser crystallization or thermal crystallization using a metal element.
4. A semiconductor device according to claim 1 , wherein the semiconductor element comprises polycrystalline silicon.
5. A semiconductor device according to claim 1 , wherein the structural layer has a multilayer structure of the polycrystalline silicon and amorphous silicon.
6. A semiconductor device according to claim 1 , wherein the structural layer has a multilayer structure of the polycrystalline silicon and silicide including silicon and a metal element.
7. A semiconductor device according to claim 1 , wherein the structural layer has a multilayer structure of the polycrystalline silicon, amorphous silicon, and silicide including silicon and a metal element.
8. A semiconductor device according to claim 1 , wherein the structural layer includes a region having the polycrystalline silicon and a region having amorphous silicon in the same layer.
9. A semiconductor device according to claim 1 , wherein the structural layer includes a region having the polycrystalline silicon and a region having silicide including silicon and a metal element in the same layer.
10. A semiconductor device according to claim 1 , wherein the structural layer includes a region having the polycrystalline silicon, a region having amorphous silicon, and a region having silicide including silicon and a metal element in the same layer.
11. A semiconductor device according to claim 3 , wherein the metal element is one or more selected from Ni, Fe, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.
12. A semiconductor device according to claim 1 , wherein the antenna is electrically connected to the semiconductor element of the electric circuit.
13. A semiconductor device according to claim 1 , further comprising:
a counter substrate so as to face the insulating surface; and
a protective layer over the microstructure, which is provided in a region of the counter substrate where the microstructure is not provided.
14. A semiconductor device according to claim 1 , wherein the microstructure has a first space provided between the structural layer and the insulating surface and a second space between the structural layer and a layer provided over the structural layer, and wherein the first space and the second space overlap with each other.
15. A semiconductor device according to claim 1 , wherein the polycrystalline silicon is patterned into a polygonal shape whose corner is round when viewed from above.
16. A semiconductor device according to claim 1 , wherein the polycrystalline silicon is formed so that a cross section has a tapered angle.
17. A semiconductor element comprising:
a microstructure over an insulating surface, comprising a lower layer having a conductive property, a structural layer over the lower layer, and a space between the structural layer and the lower layer, wherein the structural layer comprises polycrystalline silicon having continuous grain boundaries;
an electric circuit comprising a semiconductor element over the insulating surface; and
an antenna over the microstructure and the electric circuit;
wherein the antenna and the microstructure are electrically connected to the electric circuit, respectively.
18. A semiconductor device according to claim 17 , wherein the structural layer is movable in the space.
19. A semiconductor device according to claim 17 , wherein one of the lower layer and the structural layer comprises polycrystalline silicon obtained by laser crystallization or thermal crystallization using a metal element.
20. A semiconductor device according to claim 17 , wherein the semiconductor element comprises polycrystalline silicon.
21. A semiconductor device according to claim 17 , wherein the lower layer includes a metal element, a compound of the metal element, silicide including the metal element and silicon, or silicon having an impurity.
22. A semiconductor device according to claim 17 , wherein the structural layer has a multilayer structure of the polycrystalline silicon and amorphous silicon.
23. A semiconductor device according to claim 17 , wherein the structural layer has a multilayer structure of the polycrystalline silicon and silicide including silicon and a metal element.
24. A semiconductor device according to claim 17 , wherein the structural layer has a multilayer structure of the polycrystalline silicon, amorphous silicon, and silicide including silicon and a metal element.
25. A semiconductor device according to claim 17 , wherein the structural layer includes a region having the polycrystalline silicon and a region having amorphous silicon in the same layer.
26. A semiconductor device according to claim 17 , wherein the structural layer includes a region having the polycrystalline silicon and a region having silicide including silicon and a metal element in the same layer.
27. A semiconductor device according to claim 17 , wherein the structural layer includes a region having the polycrystalline silicon, a region having amorphous silicon, and a region having silicide including silicon and a metal element in the same layer.
28. A semiconductor device according to claim 19 , wherein the metal element is one or more selected from Ni, Fe, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.
29. A semiconductor device according to claim 17 , wherein the antenna is electrically connected to the semiconductor element of the electric circuit.
30. A semiconductor device according to claim 17 , further comprising:
a counter substrate so as to face the insulating surface; and
a protective layer over the microstructure, which is provided in a region of the counter substrate where the microstructure is not provided.
31. A semiconductor device according to claim 17 , wherein the microstructure has a first space provided between the structural layer and the insulating surface and a second space between the structural layer and a layer provided over the structural layer, and wherein the first space and the second space overlap with each other.
32. A semiconductor device according to claim 17 , wherein the polycrystalline silicon is patterned into a polygonal shape whose corner is round when viewed from above.
33. A semiconductor device according to claim 17 , wherein the polycrystalline silicon is formed so that a cross section has a tapered angle.