Signal converter having compensation unit
A signal converter includes a signal converting unit and a compensation unit. The signal converting unit generates intermediate differential signals at intermediate nodes in response to a single-ended signal. The compensation unit generates compensated differential signals at output nodes by minimizing phase and amplitude mismatch errors between the intermediate differential signals. The compensation unit includes a pair of transistors and a pair of capacitors configured in symmetry between the intermediate and output nodes. The signal converter of the present invention may be used to particular advantage in an RF receiver.
1. A signal converter comprising:
a signal converting unit for generating intermediate differential signals at intermediate nodes in response to a single-ended signal, wherein the signal converting unit includes:
a first converting field effect transistor having a drain coupled to a first intermediate node, a source coupled to a low voltage supply, and a gate having the single-ended signal applied thereon; and
a second converting field effect transistor having a drain coupled to a second intermediate node, a source coupled to the low voltage supply, and a gate coupled to the first intermediate node; and
a compensation unit for generating compensated differential signals at output nodes by minimizing phase and amplitude mismatch errors between the intermediate differential signals, the compensation unit including:
a pair of transistors and a pair of capacitors configured in symmetry between the intermediate and output nodes.
2. The signal converter of claim 1 , wherein the pair of transistors includes:
a first compensating field effect transistor having a drain and a source coupled between a first intermediate node and a first output node; and
a second compensating field effect transistor having a drain and a source coupled between a second intermediate node and a second output node.
3. The signal converter of claim 2 , wherein the first compensating field effect transistor has a gate coupled to the second intermediate node, and wherein the second compensating field effect transistor has a gate coupled to the first intermediate node.
4. The signal converter of claim 3 , wherein the pair of capacitors includes:
a first compensating capacitor coupled between a gate of the first compensating field effect transistor and the second intermediate node; and
a second compensating capacitor coupled between a gate of the second compensating field effect transistor and the first intermediate node.
5. The signal converter of claim 4 , wherein the first and second compensating capacitors have a same capacitance.
6. The signal converter of claim 4 , wherein the first and second compensating field effect transistors are NMOSFETs (N-channel metal oxide semiconductor field effect transistors).
7. The signal converter of claim 1 , wherein the signal converting unit further includes:
a converting capacitor coupled between the first intermediate node and the gate of the second converting field effect transistor.
8. The signal converter of claim 1 , wherein the first and second converting field effect transistors are NMOSFETs (N-channel metal oxide semiconductor field effect transistors).
9. The signal converter of claim 1 , wherein the compensation unit further includes:
a pair of impedance units coupled in symmetry between the output nodes and a high voltage supply.
10. An RF receiver comprising:
a low noise amplifier for generating a single-ended signal by amplifying and removing noise from an RF signal;
a signal converter for generating compensated differential signals from the single-ended signal, wherein the signal converter includes:
a signal converting unit for generating intermediate differential signals at intermediate nodes in response to the single-ended signal, wherein the signal converting unit includes:
a first converting field effect transistor having a drain coupled to a first intermediate node, a source coupled to a low voltage supply, and a gate having the single-ended signal applied thereon; and
a second converting field effect transistor having a drain coupled to a second intermediate node, a source coupled to the low voltage supply, and a gate coupled to the first intermediate node; and
a compensation unit for generating the compensated differential signals at output nodes by minimizing phase and amplitude mismatch errors between the intermediate differential signals, the compensation unit including:
a pair of transistors and a pair of capacitors configured in symmetry between the intermediate and output nodes; and
a mixer for mixing the compensated differential signals with local frequency differential signals to generate middle frequency differential signals.
11. The RF receiver of claim 10 , wherein the pair of transistors includes:
a first compensating field effect transistor having a drain and a source coupled between a first intermediate node and a first output node; and
a second compensating field effect transistor having a drain and a source coupled between a second intermediate node and a second output node.
12. The RF receiver of claim 11 , wherein the first compensating field effect transistor has a gate coupled to the second intermediate node, and wherein the second compensating field effect transistor has a gate coupled to the first intermediate node.
13. The RF receiver of claim 12 , wherein the pair of capacitors includes:
a first compensating capacitor coupled between a gate of the first compensating field effect transistor and the second intermediate node; and
a second compensating capacitor coupled between a gate of the second compensating field effect transistor and the first intermediate node.
14. The RF receiver of claim 13 , wherein the first and second compensating capacitors have a same capacitance.
15. The RF receiver of claim 13 , wherein the first and second compensating field effect transistors are NMOSFETs (N-channel metal oxide semiconductor field effect transistors).
16. The RE receiver of claim 10 , wherein the signal converting unit further includes:
a converting capacitor coupled between the first intermediate node and the gate of the second converting field effect transistor.
17. The RF receiver of claim 10 , wherein the first and second converting field effect transistors are NMOSFETs (N-channel metal oxide semiconductor field effect transistors).
18. The RF receiver of claim 10 , wherein the compensation unit further includes:
a pair of impedance units coupled in symmetry between the output nodes and a high voltage supply.