Port addressing method and apparatus for link layer interface
View Patent ↗A packet, cell or other data segment received in a physical layer device from a link layer device via an interface bus is processed to determine a port address for the data segment in the physical layer device. The port address, which may be an MPHY address, is determined using a combination of a first address value obtained from a link layer address portion of the data segment and a second address value obtained from a payload portion of the data segment. The data segment is stored in a memory location identified by the port address. The memory location may comprise a particular queue of the physical layer device.
1. A method of processing a data segment received in a physical laver device from a link layer device via an interface bus, the method comprising the steps of:
determining a port address for the data segment in the physical layer device using a combination of a first address value obtained from a link layer address portion of the data segment and a second address value obtained from a payload portion of the data segment; and
storing the data segment in a memory location identified by the port address;
wherein the first address value obtained from the link layer address portion of the data segment comprises a first MPHY address value determined by using a link layer address as an index into a physical port lookup table to obtain an intermediate value, and using the resulting intermediate value as an index into a logical MPHY lookup table to obtain the first MPHY address value: and
wherein the determining and storing steps are performed by the physical layer device.
2. The method of claim 1 wherein the memory location comprises a particular queue of the physical layer device.
3. The method of claim 2 wherein the determining step further comprises determining egress queue information.
4. The method of claim 3 wherein the egress queue information comprises a plurality of egress queue attributes including at least a service-specific identifier and a base address of the memory location for storing the data segment.
5. The method of claim 1 wherein the link layer address portion of the data segment comprises a portion associated with designated pins of a SPI-3interface, the designated pins being used to carry part of the payload portion of the data segment when not used to carry a link layer address.
6. The method of claim 1 wherein the link layer address portion of the data segment comprises a link layer address field of a POS-2 interface, the link layer address field being separate from the payload portion of the data segment.
7. The method of claim 1 , wherein the payload portion of the data segment comprises one or more prepend bytes including a prepend MPHY field.
8. The method of claim 7 wherein the prepend MPHY field comprises 11 bits so as to support addressing for up to 2048 different MPHYs.
9. The method of claim 7 wherein the one or more prepend bytes further comprise in-band message information.
10. The method of claim 9 wherein the in-band message information comprises information identifying a service class for a designated communication protocol.
11. The method of claim 1 wherein the second address value obtained from the payload portion of the data segment comprises a second MPHY address value that is extracted from the payload portion using a bit extractor.
12. The method of claim 1 wherein the port address is determined by adding the first address value to the second address value and using the resulting combined address value as an index into a queue information lookup table.
13. The method of claim 1 wherein a single bit extractor format is used for each of a plurality of different ports of the physical layer device.
14. The method of claim 1 wherein different bit extractor formats are used for respective ones of a plurality of ports of the physical layer device.
15. The method of claim 1 wherein multiple egress queues are managed through a single physical port.
16. The method of claim 1 wherein multiple egress queues are managed for each of a plurality of services through respective ones of a plurality of ports with numbering of the egress queues being independent of numbering of the ports.
17. The method of claim 1 wherein MPHYs of the physical layer device are partitioned among multiple services on non-power-of-2 boundaries.
18. The method of claim 17 wherein interleaving of MPHYs is supported without requiring storage of interleave state information for each of the MPHYs.
19. An apparatus comprising:
a physical layer device configured for communication with a link layer device via an interface bus, the physical layer device being operative to determine a port address for a data segment received from the link layer device using a combination of a first address value obtained from a link layer address portion of the data segment and a second address value obtained from a payload portion of the data segment;
the physical layer device comprising a memory wherein the data segment is stored in a memory location identified by the port address;
wherein the first address value obtained from the link layer address portion of the data segment comprises a first MPHY address value determined by using a link layer address as an index into a physical port lookup table to obtain an intermediate value, and using the resulting intermediate value as an index into a logical MPHY lookup table to obtain the first MPHY address value.
20. The apparatus of claim 19 wherein the physical layer device is implemented as an integrated circuit.
21. A communication system comprising:
a link layer device; and
a physical layer device;
the link layer device and the physical layer device being coupled together via an interface bus;
the physical layer device being configured to determine a port address for a data segment received from the link layer device, wherein the port address is determined using a combination of a first address value obtained from a link layer address portion of the data segment and a second address value obtained from a payload portion of the data segment, the physical layer device comprising a memory wherein the data segment is stored in a memory location identified by the port address;
wherein the first address value obtained from the link layer address portion of the data segment comprises a first MPHY address value determined by using a link layer address as an index into a physical port lookup table to obtain an intermediate value, and using the resulting intermediate value as an index into a logical MPHY lookup table to obtain the first MPHY address value.
22. The system of claim 21 wherein the second address value obtained from the payload portion of the data segment comprises a second MPHY address value that is extracted from the payload portion using a bit extractor.
23. The system of claim 21 wherein the port address is determined by adding the first address value to the second address value and using the resulting combined address value as an index into a queue information lookup table.