IP Library Granted Patent US 7,704,784
Granted Patent B2
US 7,704,784 · App. 11/354,365 · Granted Apr 27, 2010

Semiconductor devices having regions of induced high and low conductivity, and methods of making the same

Assignees: Lucent Technologies, Inc.; E.I. du Pont de Nemours and Company
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Quick Facts
Patent No.
US 7,704,784
App. No.
11/354,365
Granted
Apr 27, 2010
Kind
B2
Abstract

Semiconductor apparatus comprising: a substrate having a substrate surface; a layer of a first material overlying a first region of the substrate surface; a layer of a semiconductor overlying the layer of first material and overlying a second region of the substrate surface; a first region of the layer of semiconductor, overlying the layer of first material and having a first conductivity; a second region of the layer of semiconductor, overlying the second region of the substrate surface and having a second conductivity; and the first conductivity being substantially different from the second conductivity. Such semiconductor apparatus further comprising a layer of a second material overlying the second region of the substrate surface, the second region of the layer of semiconductor overlying the layer of the second material.

Claims (13)

1. A method of making a semiconductor apparatus, comprising the steps of: providing a substrate having a substrate surface; forming a layer of a first material overlying a first region of said substrate surface; forming a layer of a second material overlying a second region of said substrate surface; and forming a layer of a semiconductor overlying said layer of first material and overlying said layer of second material; a first region of said layer of semiconductor overlying said layer of first material and including crystal grains having a first average crystal grain size, a second region of said layer of semiconductor overlying said layer of second material and including crystal grains having a second average crystal grain size, said first average crystal grain size being substantially different from said second average crystal grain size; wherein said layer of first material overlies said second region of said substrate surface; and wherein said layer of second material is between said layer of semiconductor and said layer of first material.

2. The method of claim 1 , wherein each of the first and second materials includes a polymer.

3. The method of claim 1 , wherein said first material includes a member selected from the group consisting of: poly(para-vinyl phenol), poly(4-vinylpyridine), poly(2-vinylnaphthalene), poly(meta-vinyl phenol), poly(ortho-vinyl phenol), poly(para-vinyl phenol)-co-2-hydroxyethylmethacrylate, poly(2-vinylpyridine), poly(2-vinylnaphthalene-co-2-ethylhexyl acrylate, poly(1-vinylnaphthalene), and blends including two or more of the foregoing.

4. The method of claim 1 , wherein said second material includes a member selected from the group consisting of: poly(n-butyl methacrylate), poly(vinylidene difluoride-co-methyl vinyl ether), polystyrene, poly(p-methoxystyrene), poly(vinylidene difluoride), poly(vinyl acetate), poly(vinyl propionate), poly(methoxy acetate), poly(n-propyl methacrylate), poly(isopropyl methacrylate), poly(n-pentyl methacrylate), poly(vinylidene difluoride-co-ethyl vinyl ether), poly(vinylidene difluoride-co-propyl vinyl ether), poly(dimethylaminoethyl methacrylate), poly(dimethylaminopropyl methacrylate), poly(aminopropyl methacrylate), poly(diethylaminoethyl methacrylate), and blends including two or more of the foregoing.

5. The method of claim 1 , wherein the layer of the semiconductor is in direct contact with the layer of the second material.

6. The method of claim 1 , wherein said layer of the semiconductor is in direct contact with both said layer of the first material and said layer of the second material.

7. A method of making a semiconductor apparatus, comprising the steps of: providing a substrate having a substrate surface; forming a layer of a first material overlying a first region of said substrate surface; forming a layer of a second material overlying a second region of said substrate surface; and forming a layer of a semiconductor overlying said layer of first material and overlying said layer of second material; a first region of said layer of semiconductor overlying said layer of first material and including crystal grains having a first average crystal grain size, a second region of said layer of semiconductor overlying said layer of second material and including crystal grains having a second average crystal grain size, said second average crystal grain size being substantially larger than said first average crystal grain size; wherein said layer of first material overlies said second region of said substrate surface.

8. The method of claim 7 , wherein each of the first and second materials includes a polymer.

9. The method of claim 7 , wherein said first material includes a member selected from the group consisting of: poly(para-vinyl phenol), poly(4-vinylpyridine), poly(2-vinylnaphthalene), poly(meta-vinyl phenol), poly(ortho-vinyl phenol), poly(para-vinyl phenol)-co-2-hydroxyethylmethacrylate, poly(2-vinylpyridine), poly(2-vinylnaphthalene-co-2-ethylhexyl acrylate, poly(1-vinylnaphthalene), and blends including two or more of the foregoing.

10. The method of claim 7 , wherein said second material includes a member selected from the group consisting of: poly(n-butyl methacrylate), poly(vinylidene difluoride-co-methyl vinyl ether), polystyrene, poly(p-methoxystyrene), poly(vinylidene difluoride), poly(vinyl acetate), poly(vinyl propionate), poly(methoxy acetate), poly(n-propyl methacrylate), poly(isopropyl methacrylate), poly(n-pentyl methacrylate), poly(vinylidene difluoride-co-ethyl vinyl ether), poly(vinylidene difluoride-co-propyl vinyl ether), poly(dimethylaminoethyl methacrylate), poly(dimethylaminopropyl methacrylate), poly(aminopropyl methacrylate), poly(diethylaminoethyl methacrylate), and blends including two or more of the foregoing.

11. The method of claim 7 , wherein the layer of the semiconductor is in direct contact with the layer of the second material.

12. The method of claim 7 , wherein said layer of the semiconductor is in direct contact with both said layer of the first material and said layer of the second material.

13. The method of claim 7 , wherein said layer of second material is between said layer of semiconductor and said layer of first material.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2014
From: CREDIT SUISSE AG
To: ALCATEL-LUCENT USA INC.
Reel/Frame 033949/0531 →
SECURITY INTEREST Recorded Mar 7, 2013
From: ALCATEL-LUCENT USA INC.
To: CREDIT SUISSE AG
Reel/Frame 030510/0627 →
MERGER Recorded Feb 25, 2010
From: LUCENT TECHNOLOGIES INC.
To: ALCATEL-LUCENT USA INC.
Reel/Frame 023989/0554 →
Continuity (2)
Division 1067130300 · Sep 24, 2003
Related Publication 20060141664A1 · Jun 29, 2006