IP Library › Granted Patent US 7,718,269
Granted Patent B2
US 7,718,269 · App. 11/374,075 · Granted May 18, 2010

Semiconductor manufacturing method for inter-layer insulating film

Assignee: Renesas Technology Corp.
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Quick Facts
Patent No.
US 7,718,269
App. No.
11/374,075
Granted
May 18, 2010
Kind
B2
Abstract

Provided is a technology capable of improving the reliability of a semiconductor device using a SiOC film as an interlayer film. In the invention, by forming an interlayer film from a SiOC film having a Si—CH 3 bond/Si—O bond ratio less than 2.50% or having a strength ratio determined by the FT-IR of a Si—OH bond to a SiO—O bond exceeding 0.0007, a strength ratio of a SiH bond to a SiO—O bond at a wavelength of 2230 cm −1 exceeding 0.0050 and a strength ratio of a Si—H bond to a SiO—O bond at a wavelength of 2170 cm −1 exceeding 0.0067, the interlayer film has a relative dielectric constant of to 3 or less, and owing to suppression of lowering in hardness or elastic modulus, has improved mechanical strength.

Claims (12)

1. A manufacturing method of a semiconductor device, which comprises forming a single-layer or multilayer wiring made of a metal material over a semiconductor substrate, wherein:

an interlayer film for electrically isolating two adjacent wirings is formed from a SiOC film that is formed under a pressure between 400 and 600 Pa: and

a ratio of a Si—CH 3 bond to a Si—O bond of the SiOC film as determined by FT-IR is less than 2.50%.

2. A manufacturing method of a semiconductor device according to claim 1 , wherein the ratio of a Si—CH 3 bond to a Si—O bond of the SiOC film falls within a range of 2.05 to 2.49%.

3. A manufacturing method of a semiconductor device according to claim 1 , wherein the SiOC film has a relative dielectric constant of 3 or less.

4. A manufacturing method of a semiconductor device according to claim 1 , wherein the SiOC film has a hardness of 2.8 Gpa or greater.

5. A manufacturing method of a semiconductor device according to claim 1 , wherein the SiOC film has an elastic modulus of 18 Gpa or greater.

6. A manufacturing method of a semiconductor device according to claim 1 , wherein the SiOC film is formed by plasma CVD method.

7. A manufacturing method of a semiconductor device according to claim 6 , wherein the SiOC film is formed under the following film forming conditions: DMDMOS flow rate between 200 and 350 sccm, He flow rate between 100 and 200 sccm, RF power of 3000 to 4000W and substrate temperature between 350 and 400° C.

8. A manufacturing method of a semiconductor device according to claim 1 , wherein the wiring is damascene wiring having copper as a main conductor layer.

9. A manufacturing method of a semiconductor device according to claim 1 , wherein the ratio of Si—CH 3 bond to Si—O bond of the SiOC film falls within a range of 2.30 to 2.40%.

10. A manufacturing method of a semiconductor device according to claim 1 , wherein the SiOC film has a strength ratio of a Si—OH bond to a SiO—O bond exceeding 0.0007, a strength ratio of a Si—H bond to a SiO—O bond at a wavelength of 2230 cm −1 exceeding 0.0050 and a strength ratio of a Si—H bond to a SiO—O bond at a wavelength of 2170 cm −1 exceeding 0.0067, each determined by the FT-IR.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Jul 30, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025204/0512 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2006
From: TAKAYASU, MASAMI; HOTTA, KATSUHIKO
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 017671/0200 →
Priority Claims (1)
JP 2005-070788 · Mar 14, 2005 · national
Continuity (1)
Related Publication 20060204673A1 · Sep 14, 2006