Phase change memory device
There is provided a semiconductor device. The semiconductor device includes a lower electrode, a contact connected to the lower electrode to have a double trench structure, a phase change material layer accommodated in the double trench to cause a phase change between a crystalline state and an amorphous state in accordance with a change in heat transmitted by the contact, and an upper electrode connected to the phase change material layer.
1. A semiconductor device comprising:
a lower electrode;
a contact comprising a lower portion and an upper portion thereon, the upper portion having substantially vertical sidewalls and a width greater than that of the lower portion, the lower portion having substantially vertical sidewalls and being connected to the lower electrode;
a phase change material layer in the upper portion of the contact, the phase change material layer having substantially vertical sidewalls, a substantially horizontal lowermost surface, and an area smaller than that of the upper portion of the contact; and
an upper electrode connected to the phase change material layer.
2. The semiconductor device of claim 1 , wherein the contact is in a dual damascene trench and via.
3. The semiconductor device of claim 2 , wherein the phase change material layer is in the dual damascene trench.
4. The semiconductor device of claim 1 , wherein the phase change material layer includes a material comprising Ge, Sb, and Te.
5. The semiconductor device of claim 4 , wherein the phase change material layer includes a Ge—Sb—Te based nucleation dominant material (NDM).
6. The semiconductor device of claim 1 , wherein the phase change material layer includes a material comprising Sb and Te in a molar ratio of 1:1 or greater.
7. The semiconductor device of claim 6 , wherein the phase change material layer includes a material comprising Sb and Te in a molar ratio of 2:1 or greater.
8. The semiconductor device of claim 6 , wherein the phase change material layer includes a Sb 70 Te 30 based fast growth material (FGM).
9. The semiconductor device of claim 1 , wherein the phase change material undergoes a phase change between a crystalline state and an amorphous state in accordance with a change in heat transmitted by the contact.
10. The semiconductor device of claim 1 , wherein the phase change material layer includes four sidewalls surrounded by the upper portion of the contact.
11. The semiconductor device of claim 10 , wherein the contact transmits heat to the phase change material layer through the four sidewalls of the phase change material layer.
12. The semiconductor device of claim 1 , wherein the contact transmits heat to the phase change material layer through the substantially horizontal surface of the phase change material layer.
13. The semiconductor device of claim 1 , wherein the lower electrode comprises Ti, Ni, W, Cu, N, or polycrystalline silicon.
14. The semiconductor device of claim 13 , wherein the upper electrode comprises Ti, Ni, W, Cu, N, or polycrystalline silicon.
15. The semiconductor device of claim 1 , wherein the contact comprises an electrically conductive material.
16. The semiconductor device of claim 1 , further comprising a first protective layer on the lower electrode, wherein the contact is in the first protective layer.
17. The semiconductor device of claim 16 , further comprising a second protective layer on the first protective layer, and a via in the second protective layer.
18. The semiconductor device of claim 17 , wherein the via is in electrical contact with the phase change material layer.
19. The semiconductor device of claim 17 , wherein the via comprises a metal layer.
20. The semiconductor device of claim 17 , wherein the upper electrode is electrically connected to the via.