IP Library Granted Patent US 7,733,128
Granted Patent B2
US 7,733,128 · App. 11/912,800 · Granted Jun 8, 2010

Transmitting apparatus

Assignee: Thine Electronics, Inc.
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Quick Facts
Patent No.
US 7,733,128
App. No.
11/912,800
Granted
Jun 8, 2010
Kind
B2
Abstract

To provide a transmitting apparatus capable of suppressing the fluctuation of a common mode potential and performing high-speed, long-distance signal transmission. The transmitting apparatus has a main buffer circuit and a pre-emphasis buffer circuit 20 . The pre-emphasis buffer circuit 20 , which has a switch circuit 21 , a first current source 22 , and a second current source 23 , uses the switch circuit 21 to output a current signal having the same direction as an output current of the main buffer circuit 10 during a certain time interval starting from a time point when the level of data to be transmitted changes, and brings the output terminals 201, 202 to a High-Z state during a time interval when the level is constant after a lapse of the abovementioned certain time interval. The output of the pre-emphasis buffer circuit 20 has no influence on the common mode potential of the output of the main buffer circuit but has influence only the amplitude of the current signal output to a differential transmission line. In this manner, the transmitting apparatus can suppress the fluctuation of the common mode potential and can perform high-speed, long-distance signal transmission.

Claims (26)

1. A transmitting apparatus for transmitting a digital signal by changing a direction of flow of a current signal that is output to a pair of resistor-terminated differential transmission lines, the transmitting apparatus comprising:

a main buffer circuit, which has a first main output terminal and a second main output terminal connected to the differential transmission lines, outputs a current signal flowing from the first main output terminal to the second main output terminal via the differential transmission lines when a digital signal to be transmitted is at an H level, and outputs a current signal flowing from the second main output terminal to the first main output terminal via the differential transmission lines when the digital signal to be transmitted is at an L level; and

a pre-emphasis buffer circuit, which has a first output terminal connected to the first main output terminal, a second output terminal connected to the second main output terminal, a first current source and a second current source each generating a constant current, and a switch circuit for switching the relation of connection among the first current source, the second current source, the first output terminal, and the second output terminal,

wherein the pre-emphasis buffer circuit connects, by means of the switch circuit, the first current source and the first output terminal to each other and connects the second current source and the second output terminal to each other to output a current signal flowing from the first output terminal to the second output terminal via the differential transmission lines, and

connects, by means of the switch circuit, the first current source and the second output terminal to each other and connects the second current source and the first output terminal to each other to output a current signal flowing from the second output terminal to the first output terminal via the differential transmission lines,

wherein during a first time interval starting from a time point when the level of the digital signal to be transmitted is switched from the L level to the H level, the pre-emphasis buffer circuit connects the first current source and the first output terminal to each other and connects the second current source and the second output terminal to each other by means of the switch circuit to output the current signal flowing from the first output terminal to the second output terminal via the differential transmission lines,

during a second time interval starting from a time point when the level of the digital signal to be transmitted is switched from the H level to the L level, the pre-emphasis buffer circuit connects the first current source and the second output terminal to each other and connects the second current source and the first output terminal to each other by means of the switch circuit to output the current signal flowing from the second output terminal to the first output terminal via the differential transmission lines, and

during a third time interval other than the first time interval and the second time interval the pre-emphasis buffer circuit separates the first current source from both the first output terminal and the second output terminal, and separates the second current source from both the first output terminal and the second output terminal by means of the switch circuit,

wherein the pre-emphasis buffer circuit further has a voltage-holding circuit that keeps a potential of a first connection point between the first current source and the switch circuit constant, and keeps a potential of a second connection point between the second current source and the switch circuit constant.

2. The transmitting apparatus according to claim 1 , wherein the switch circuit has:

a first switch provided between the first connection point and the first output terminal;

a second switch provided between the first connection point and the second output terminal;

a third switch provided between the second connection point and the first output terminal; and

a fourth switch provided between the second connection point and the second output terminal,

the voltage-holding circuit has:

a fifth switch that performs switching operation opposite to switching operation performed by the first switch;

a sixth switch that performs switching operation opposite to switching operation performed by the second switch;

a seventh switch that performs switching operation opposite to switching operation performed by the third switch;

an eighth switch that performs switching operation opposite to switching operation performed by the fourth switch;

a first resistor provided between a first end of the fifth switch and a first end of the seventh switch; and

a second resistor provided between a first end of the sixth switch and a first end of the eighth switch,

a second end of the fifth switch and a second end of the sixth switch are connected to the first connection point, and

a second end of the seventh switch and a second end of the eighth switch are connected to the second connection point.

3. The transmitting apparatus according to claim 2 , wherein

resistance values of the first resistor and the second resistor are twice a value of terminating resistance of the differential transmission lines, and

a resistance value obtained when each of the fifth through eighth switches is in an on-state is twice a resistance value obtained when each of the first through fourth switches is in the on-state.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 6, 2012
From: THINE ELECTRONICS, INC.
To: THINE ELECTRONICS, INC.
Reel/Frame 028331/0567 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2007
From: MIURA, SATOSHI
To: THINE ELECTRONICS, INC.
Reel/Frame 020027/0686 →
Priority Claims (1)
JP 2005-134369 · May 2, 2005 · national
Continuity (1)
Related Publication 20090033365A1 · Feb 5, 2009