Constant slope ramp circuits for sample-data circuits
A sample-data analog circuit includes a level-crossing detector. The level-crossing detector controls sampling switches to provide a precise sample of the output voltage when the level-crossing detector senses the predetermined level crossing of the input signal. A multiple segment ramp waveform generator is used in the sample-data analog circuits. The ramp waveform generator includes an amplifier, a variable current source, and a voltage detection circuit coupled to the current source to control the change in the amplitude of the current. The ramp generator produces constant slope within each segment regardless of the load condition. The sample-data analog circuit also utilizes variable bandwidths and thresholds.
1. A circuit, comprising:
a level-crossing detector to generate a logic level-crossing detection signal when an input signal crosses a predetermined voltage level;
a sampling capacitor to sample an output voltage;
a sampling switch, operatively coupled to said sampling capacitor and said level-crossing detector, said sampling switch turning OFF when said level-crossing detection signal indicates the input signal has crossed the predetermined voltage level to sample the output voltage on said sampling capacitor; and
a waveform generator, operatively coupled to said level-crossing detector, to generate a predetermined waveform in response to the input signal crossing the predetermined voltage level;
said waveform generator including an amplifier.
2. The circuit as claimed in claim 1 , wherein said waveform generator further includes a current source.
3. The circuit as claimed in claim 2 , wherein said current source is a variable current source;
said variable current source being operatively coupled to said level-crossing detector;
said variable current source changing a current level therefrom in response to said level-crossing detection signal.
4. The circuit as claimed in claim 1 , wherein said waveform generator produces a predetermined waveform.
5. The circuit as claimed in claim 1 , wherein said waveform generator produces a plurality of segments, each segment having a distinct substantially constant slope, said plurality of segments forming a predetermined waveform.
6. The circuit as claimed in claim 5 , wherein said waveform generator provides the predetermined waveform to compensate for a voltage error generated by a finite delay associated with said level-crossing detector.
7. The circuit as claimed in claim 1 , wherein said waveform generator includes a capacitor, said capacitor being operatively connectable to said amplifier so as to enable a negative feedback loop.
8. The circuit as claimed in claim 7 , wherein said waveform generator further includes a switch to enable said capacitor to be operatively connected to said amplifier as an element of a negative feedback loop.
9. The circuit as claimed in claim 1 , wherein said level-crossing detector is a zero-crossing detector.
10. The circuit as claimed in claim 1 , wherein said waveform generator produces a predetermined positive slope waveform.
11. The circuit as claimed in claim 1 , wherein said waveform generator produces a predetermined negative slope waveform.
12. The circuit as claimed in claim 3 , wherein said variable current source comprises a plurality of selectable current sources.
13. A method for sampling an analog signal, the method comprising:
(a) sampling an input voltage using a switched capacitance network, the switched capacitance network including a capacitor and a plurality of switches associated therewith;
(b) generating a ramp waveform in response to an input signal crossing a predetermined voltage level, the voltage ramp signal comprising a plurality of voltage ramp signal segments, each voltage ramp signal segment has a different positive slope; and
(c) applying negative feedback, through a capacitor, to linearize the ramp waveform.
14. The method as claimed in claim 13 , wherein the predetermined voltage level is a zero voltage level.
15. A method for sampling an analog signal, the method comprising:
(a) sampling an input voltage using a switched capacitance, the switched capacitance including a capacitor and a plurality of switches associated therewith;
(b) determining when a node voltage of a switched capacitance network crosses a predetermined level, the switched capacitance network including a capacitor and a plurality of switches associated therewith;
(c) generating a voltage ramp signal in response to the determination of when the node voltage of the switched capacitance network crosses the predetermined level, the voltage ramp signal comprising a plurality of voltage ramp signal segments, each voltage ramp signal segment has a different negative slope; and
(d) applying negative feedback, through a capacitor, to linearize the voltage ramp signal.
16. The method as claimed in claim 15 , wherein the predetermined level is a zero voltage level.
17. The method as claimed in claim 15 , wherein the voltage ramp signal has negative and positive slopes.
18. The method as claimed in claim 15 , wherein the voltage ramp signal has alternating negative and positive slopes.
19. A method for sampling an analog signal, the method comprising:
(a) sampling an input voltage using a switched capacitance, the switched capacitance including a capacitor and a plurality of switches associated therewith;
(b) determining when a node voltage of a switched capacitance network crosses a predetermined level, the switched capacitance network including a capacitor and a plurality of switches associated therewith;
(c) generating a voltage ramp signal in response to the determination of when the node voltage of the switched capacitance network crosses the predetermined level, the voltage ramp signal comprising a plurality of voltage ramp signal segments, each voltage ramp signal segment has a different positive slope; and
(d) applying negative feedback, through a capacitor, to linearize the voltage ramp signal.
20. A method for sampling an analog signal, the method comprising:
(a) sampling an input voltage using a switched capacitance network, the switched capacitance network including a capacitor and a plurality of switches associated therewith;
(b) generating a ramp waveform in response to an input signal crossing a predetermined voltage level, the voltage ramp signal comprising a plurality of voltage ramp signal segments, each voltage ramp signal segment has a different negative slope; and
(c) applying negative feedback, through a capacitor, to linearize the ramp waveform.