IP Library › Granted Patent US 7,741,631
Granted Patent B2
US 7,741,631 · App. 12/147,996 · Granted Jun 22, 2010

Phase-changeable memory devices including phase-changeable materials on silicon nitride layers

Assignee: Samsung Electronics Co., Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,741,631
App. No.
12/147,996
Granted
Jun 22, 2010
Kind
B2
Abstract

A phase-changeable memory device includes a substrate having a contact region on an upper surface thereof. An insulating interlayer on the substrate has an opening therein, and a lower electrode is formed in the opening. The lower electrode has a nitrided surface portion and is in electrical contact with the contact region of the substrate. A phase-changeable material layer pattern is on the lower electrode, and an upper electrode is on the phase-changeable material layer pattern. The insulating interlayer may have a nitrided surface portion and the phase-changeable material layer may be at least partially on the nitrided surface portion of the insulating interlayer. Methods of forming phase-changeable memory devices are also disclosed.

Claims (32)

1. A phase-changeable memory device comprising:

a substrate having a contact region therein;

an insulating interlayer on the substrate;

a silicon nitride layer on an upper surface of the insulating interlayer opposite the substrate;

a lower electrode extending through the silicon nitride layer and the insulating interlayer and in electrical contact with the contact region of the substrate;

a phase-changeable material layer pattern on the lower electrode and extending across at least a portion of the silicon nitride layer that is between the phase-changeable material layer pattern and the insulating interlayer; and

an upper electrode on the phase-changeable material layer pattern;

wherein a surface portion of the silicon nitride layer has an increased nitrogen concentration relative to a lower portion of the silicon nitride layer.

2. The device of claim 1 , further comprising a seed layer pattern on the lower electrode and the silicon nitride layer beneath the phase-changeable material layer pattern.

3. The device of claim 2 , wherein the seed layer pattern comprises a material of a GeTe—Sb 2 Te 3 binary system.

4. The device of claim 2 , wherein the seed layer pattern includes a nitrogen dopant and/or an oxygen dopant.

5. The device of claim 2 , wherein the seed layer pattern includes a transition metal dopant.

6. The device of claim 2 , wherein the seed layer pattern comprises GeN and/or InN.

7. The device of claim 1 , wherein the silicon nitride layer is directly on the upper surface of the insulating interlayer opposite the substrate.

8. The device of claim 1 , further comprising a seed layer pattern between the lower electrode and the phase-changeable material layer pattern, wherein the seed layer pattern extends across the at least a portion of the silicon nitride layer that is between the phase-changeable material layer pattern and the insulating interlayer and is in direct contact with the silicon nitride layer.

9. A phase-changeable memory device comprising:

a substrate having a contact region therein;

an insulating interlayer on the substrate;

a silicon nitride layer on an upper surface of the insulating interlayer opposite the substrate;

a lower electrode extending through the silicon nitride layer and the insulating interlayer and in electrical contact with the contact region of the substrate;

a phase-changeable material layer pattern on the lower electrode and extending across at least a portion of the silicon nitride layer that is between the phase-changeable material layer pattern and the insulating interlayer;

an upper electrode on the phase-changeable material layer pattern; and

a seed layer pattern on the lower electrode and the silicon nitride layer beneath the phase-changeable material layer pattern;

wherein the seed layer pattern comprises an InGeSbTe compound and/or a GeSnSbTe compound.

10. A phase-changeable memory device comprising:

a substrate having a contact region therein;

an insulating interlayer on the substrate;

a silicon nitride layer on an upper surface of the insulating interlayer opposite the substrate;

a lower electrode extending through the silicon nitride layer and the insulating interlayer and in electrical contact with the contact region of the substrate;

a phase-changeable material layer pattern on the lower electrode and extending across at least a portion of the silicon nitride layer that is between the phase-changeable material layer pattern and the insulating interlayer; and

an upper electrode on the phase-changeable material layer pattern;

wherein a surface portion of the lower electrode has an increased nitrogen concentration relative to a lower portion of the lower electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2008
From: KUH, BONG-JIN; HA, YONG-HO; YI, JI-HYE
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 021161/0957 →
Priority Claims (1)
KR 10-2004-0064712 · Aug 17, 2004 · national
Continuity (2)
Division 1120574200 · Aug 17, 2005
Related Publication 20080258128A1 · Oct 23, 2008