Method and apparatus for a printed circuit board using laser assisted metallization and patterning of a substrate
A printed circuit is made by laser projection patterning a metal panel of a substrate, laminating a dielectric layer on the metal panel, laser irradiating the substrate to form vias in the substrate, laser activating a seed coat on the substrate, washing the seed coat from an unpatterned portion of the substrate, forming a patterned build-up layer on the substrate, and etching away a metal plating forming metal protrusions.
1. A method comprising:
laser projection patterning a metal panel of a substrate;
laminating a dielectric layer on the metal panel;
laser irradiating the substrate to form a plurality of vias in the substrate;
laser activating a seed coat on the substrate to form activated seed coat portions and unactivated seed coat portions;
washing the unactivated seed coat portions from the substrate to yield a patterned build-up layer on the activated seed coat portions on the substrate; and
after washing the unactivated seed coat portions, forming a conductive layer on the activated seed coat portions.
2. The method of claim 1 , further comprising:
dip coating the substrate in a seeding solution to provide the seed coat.
3. The method of claim 1 , further comprising:
electrolytic plating a metal selectively on traces and the plurality of vias on the patterned build-up layer according to a predetermined interconnect pattern to yield interconnects, wherein a sacrificial copper plating is used to provide an electrical connection for the electrolytic plating.
4. The method of claim 3 , further comprising:
electrolytic metal plating the traces.
5. The method of claim 3 , further comprising:
palladium dry film resist lamination; and
dry film resist stripping the substrate.
6. The method of claim 1 , further comprising:
performing laser assisted metallization before the washing the seed coat, and
providing a patterned conductive layer on the patterned-build-up-layer-substrate combination according to the predetermined interconnect pattern by electrolessly plating the patterned-build-up-layer-substrate combination to yield an electrolessly plated substrate.
7. The method of claim 1 , wherein the seed coat comprises palladium acetate.
8. The method of claim 1 , wherein the build-up layer comprises a palladium seeded organic build-up layer.
9. The method of claim 1 , wherein laser projection patterning further comprises drilling a plurality of micro vias.