High resolution digital analog conversion circuit
To increase the accuracy and resolution of an m bit digital analog converter, n bit input values with n>m are fed to a control circuit and converted to a series of control values for the digital analog converter using dithering techniques. When the series of control values straddles a major transition where a large number of bits are switched between 1 and 0, a corrected series of control values is retrieved from a calibration table. The corrected series takes into account the glitch effects observed at the output of digital analog converter at a major transition.
1. A digital analog conversion circuit converting an input value of n bits to an output voltage comprising
a digital analog converter having a resolution of m<n bits and converting a control value of m bits to a raw voltage,
a control circuit converting a said input value to a series of different control values and thereby generating a raw voltage whose average is equal to said output voltage,
wherein said control circuit comprises a calibration table, wherein said calibration table attributes, to a subset of all possible input values, series of control values.
2. The digital analog conversion circuit of claim 1 wherein said subset is the set of all possible input values whose series of control values comprises binary values whose k least significant bits change between . . .111and . . .000 with k being an integer larger than 1.
3. The digital analog conversion circuit of claim 2 wherein said subset is the set of all possible input values whose series of control values comprises binary values whose k least significant bits change between . . . 111 and . . .000 with k being an integer larger than 7.
4. The digital analog conversion circuit of claim 1 wherein at least part of said series of control values derived from said calibration table comprises values differing by more than 1.
5. A method for generating an analog output voltage from a digital input value using the digital analog conversion circuit of claim 1 comprising the steps of
checking if a received input value belongs to said subset of input values, and, if yes
consulting said calibration table for generating the series of control values attributed to said received input value.
6. The method of claim 5 further comprising a calibration step wherein, for at least one input value in said subset, the series of control values attributed to said input value is found by feeding trial control values to said digital analog converter.
7. The method of claim 6 wherein said calibration step comprises
generating a trial series of control values, feeding the trial series to said digital analog converter and
measuring an average value of said raw voltage in response to said trial series for obtaining a series to be stored in said calibration table.