IP Library › Granted Patent US 7,791,146
Granted Patent B2
US 7,791,146 · App. 11/857,157 · Granted Sep 7, 2010

Semiconductor device including field effect transistor and method of forming the same

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,791,146
App. No.
11/857,157
Granted
Sep 7, 2010
Kind
B2
Abstract

A semiconductor device includes a gate insulator and a gate electrode stacked on a substrate, a source/drain pattern which fills a recess region formed at opposite sides adjacent to the gate electrode, the source/drain pattern being made of silicon-germanium doped with dopants and a metal germanosilicide layer disposed on the source/drain pattern. The metal germanosilicide layer is electrically connected to the source/drain pattern. Moreover, a proportion of germanium amount to the sum of the germanium amount and silicon amount in the metal germanosilicide layer is lower than that of germanium amount to the sum of the germanium amount and silicon amount in the source/drain pattern.

Claims (14)

1. A semiconductor device comprising:

a gate insulator and a gate electrode stacked on a substrate;

a source/drain pattern which fills a recess region formed at opposite sides adjacent to the gate electrode, the source/drain pattern being made of silicon-germanium doped with dopants; and

a metal germanosilicide layer disposed on the source/drain pattern, the metal germanosilicide layer being electrically connected to the source/drain pattern,

wherein a proportion of germanium amount to the sum of the germanium amount and silicon amount in the metal germanosilicide layer is lower than that of germanium amount to the sum of the germanium amount and silicon amount in the source/drain pattern.

2. The semiconductor device as recited in claim 1 , wherein the proportion of germanium amount to the sum of the germanium amount and silicon amount in the source/drain pattern is about 15 percent to about 90 percent.

3. The semiconductor device as recited in claim 1 , wherein the proportion of germanium amount to the sum of the germanium amount and silicon amount in the metal germanosilicide layer is about 5 percent to about 10 percent.

4. The semiconductor device as recited in claim 1 , further comprising:

a gate spacer disposed on opposite sidewalls of the gate electrode.

5. The semiconductor device as recited in claim 1 , wherein the substrate is doped with N-type dopants and the source/drain pattern is doped with P-type dopants.

6. The semiconductor device as recited in claim 1 , wherein a germanium concentration of the metal germanosilicide layer is substantially uniform throughout the metal germanosilicide layer.

7. The semiconductor device as recited in claim 1 , wherein a germanium concentration at the top surface of the metal germanosilicide layer is lower than that at the bottom surface of the metal germanosilicide layer.

8. The semiconductor device as recited in claim 1 , wherein the metal germanosilicide layer is in direct contact with the source/drain pattern.

9. The semiconductor device as recited in claim 1 , wherein the metal germanosilicide layer is made of nickel germanosilicide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2007
From: KIM, MYUNG SUN; RHEE, HWA SUNG; UENO, TETSUJI; LEE, HO; YI, JI HYE
To: SAMSUNG ELECTRONICS CO., LTD
Reel/Frame 019844/0056 →
Priority Claims (1)
KR 10-2006-0091360 · Sep 20, 2006 · national
Continuity (1)
Related Publication 20080067609A1 · Mar 20, 2008