IP Library › Granted Patent US 7,795,621
Granted Patent B2
US 7,795,621 · App. 11/356,407 · Granted Sep 14, 2010

Thin film transistor panel

Assignee: Casio Computer Co., Ltd.
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Quick Facts
Patent No.
US 7,795,621
App. No.
11/356,407
Granted
Sep 14, 2010
Kind
B2
Abstract

A thin film transistor panel including: a transparent substrate; scanning lines made of a light blocking electroconductive material to be formed on the transparent substrate; data lines formed on the transparent substrate to be perpendicular to the scanning lines and made of a light blocking electroconductive material; thin film transistors, each provided with a transparent gate electrode connected to one of the scanning lines, a transparent drain electrode connected to one of the data lines, a transparent source electrode and a transparent semiconductor thin film; and transparent pixel electrodes connected to the thin film transistors, wherein each of the pixel electrodes is formed to cover at least a part of the gate electrode of each of the thin film transistors.

Claims (27)

1. A thin film transistor panel comprising:

a transparent substrate;

scanning lines which are made of a light blocking electroconductive material, and which are formed on the transparent substrate;

data lines which are formed on the transparent substrate perpendicular to the scanning lines, and which are made of the light blocking electroconductive material;

thin film transistors each including: (i) a transparent gate electrode, a part of which overlaps one of the scanning lines so as to be electrically connected to the one of the scanning lines, (ii) a transparent drain electrode, a part of which overlaps one of the data lines so as to be electrically connected to the one of the data lines, (iii) a transparent source electrode, and (iv) a transparent metal oxide semiconductor thin film;

transparent pixel electrodes which are formed with a transparent metal oxide as anode electrodes, and which are electrically connected to the source electrode; and

an organic EL layer and a cathode electrode which are formed in a region corresponding to each of the anode electrodes,

wherein each of the pixel electrodes covers at least a part of the gate electrode so as to avoid a region where the gate electrode overlaps the one of the scanning lines, and the pixel electrodes also function as the source electrodes.

2. The thin film transistor panel according to claim 1 , wherein the pixel electrodes are formed to cover the semiconductor thin film.

3. The thin film transistor panel according to claim 1 , wherein each of the anode electrodes, the organic EL layers and the cathode electrode are laminated in order from a lower layer side.

4. The thin film transistor panel according to claim 3 , wherein the cathode electrode is a reflecting electrode.

5. The thin film transistor panel according to claim 1 , wherein a transparent metal oxide film is formed on at least one of a top face and a bottom face of the scanning lines and the data lines.

6. A thin film transistor panel comprising:

a transparent substrate;

scanning lines which are made of a light blocking electroconductive material, and which are formed on the transparent substrate;

data lines which are formed on the transparent substrate perpendicular to the scanning lines, and which are made of the light blocking electroconductive material;

thin film transistors each including: (i) a transparent gate electrode, a part of which overlaps one of the scanning lines so as to be electrically connected to the one of the scanning lines, (ii) a transparent drain electrode, a part of which overlaps one of the data lines so as to be electrically connected to the one of the data lines, (iii) a transparent source electrode, and (iv) a transparent metal oxide semiconductor thin film; and

transparent pixel electrodes which are electrically connected to the source electrode,

wherein each of the thin film transistors includes a channel protecting film,

wherein each of the pixel electrodes is located to cover all of a region where the gate electrode overlaps with the channel protecting film, and to avoid a region where the gate electrode overlaps the one of the scanning lines.

7. The thin film transistor panel according to claim 6 , wherein the drain electrode, the source electrode and the gate electrode of each of the thin film transistors are made of a metal oxide including impurities.

8. The thin film transistor panel according to claim 7 , wherein the drain electrode and the source electrode are formed on the semiconductor thin film.

9. The thin film transistor panel according to claim 7 , wherein the gate electrode of each of the thin film transistors is formed with a metal oxide including p type impurities.

10. The thin film transistor panel according to claim 6 , wherein the transparent pixel electrodes are formed with a transparent metal oxide and the transparent pixel electrodes also function as the source electrodes.

11. The thin film transistor panel according to claim 6 , further comprising:

an overcoat film formed on the source electrode; and

wherein each of the pixel electrodes is electrically connected to the source electrode through a contact hole that is formed in the overcoat film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2013
From: REMSEN INNOVATION, LLC
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 030951/0988 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2012
From: CASIO COMPUTER CO., LTD.
To: REMSEN INNOVATION, LLC
Reel/Frame 028265/0258 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2006
From: YAMAGUCHI, IKUHIRO; TAKEI, MANABU; YOSHIDA, MOTOHIKO
To: CASIO COMPUTER CO., LTD.
Reel/Frame 017651/0811 →
Priority Claims (1)
JP 2005-054403 · Feb 28, 2005 · national
Continuity (1)
Related Publication 20060192204A1 · Aug 31, 2006