IP Library Granted Patent US 7,796,355
Granted Patent B2
US 7,796,355 · App. 11/607,534 · Granted Sep 14, 2010

Reverse write current preshoot

Assignee: Seagate Technology LLC
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,796,355
App. No.
11/607,534
Granted
Sep 14, 2010
Kind
B2
Abstract

Methods of generating a write current in response to a write command include generating a reverse preshoot write current having a polarity opposite to a polarity for generating a magnetic transition corresponding to the write command, and then generating a write current to effect the magnetic transition corresponding to the write command. The write current may be used for writing data to a storage disk of a disk drive that includes a write head configured to apply a magnetic field to the storage disk responsive to write currents. A preamplifier circuit includes a write current generator configured to receive a write current command and configured to generate, responsive to the write current command, a reverse preshoot current having a first polarity that is opposite a second polarity for generating a magnetic transition corresponding to the write command.

Claims (52)

1. A method of generating a write current comprising:

writing a single data transition on a magnetic data storage medium by:

generating a first overshoot current having a first polarity;

generating a first steady state current having the first polarity and is less than the first overshoot current;

generating a second overshoot current having the first polarity and is greater than the first steady state current; and then

generating a second steady state current having a second polarity that is opposite the first polarity in order to write a magnetic transition on a data storage medium.

2. The method of claim 1 , further comprising:

receiving a write command; and

generating the write current in response to the write command.

3. The method of claim 1 , wherein the second overshoot current has a magnitude that is greater than a magnitude of the first overshoot current.

4. The method of claim 1 , wherein the second overshoot current has a magnitude that is less than or about equal to a magnitude of the first overshoot current.

5. The method of claim 1 , wherein the second overshoot current has a magnitude that is at least about 10% greater than a magnitude of the first steady state current.

6. The method of claim 1 , wherein the second overshoot current has a magnitude that exceeds a magnitude of the first steady state current by an amount that is at least about 10% of an amount by which the first overshoot current exceeds the first steady state current.

7. The method of claim 1 , wherein generating the second overshoot current comprises generating a data source signal, delaying the data source signal, and scaling the data source signal; and

wherein generating the first overshoot current comprises delaying the data source signal by a second delay that is longer than the first delay and scaling the data source signal by a second scale factor; and

wherein the method further comprises combining the second overshoot current and the first overshoot current.

8. The method of claim 7 , further comprising:

generating a third current signal by delaying the data source signal by a third delay that is longer than the second delay and scaling the data source signal by a third scale factor; and

combining the third current signal with the first overshoot current and the second overshoot current.

9. A circuit comprising:

a write current generator configured to generate, in the following specific order: a first overshoot current greater than a first steady state current, the first steady state current, a second overshoot current greater than the first steady state current, and a second steady state current having a first polarity that is opposite a second polarity of the first steady state current, the first overshoot current, and the second overshoot current.

10. The circuit of claim 9 , wherein the write current generator is further configured to generate a second steady state current having the second polarity, and to apply the second steady state current after applying the first overshoot current, the first steady state current, and the second overshoot current.

11. The circuit of claim 10 , wherein the write current generator is further configured to generate a third overshoot current having a polarity that is the same as the second steady state current, and to apply the third overshoot current after the second overshoot current.

12. The circuit of claim 9 , wherein the write current generator comprises:

a baseline circuit configured to receive an input data signal and to responsively generate a baseline current signal and a control signal;

a second overshoot current circuit configured to generate a second overshoot current signal in response to the control signal; and

a combiner configured to combine the baseline current signal and the second overshoot current signal.

13. The circuit of claim 12 , wherein the write current generator further comprises:

an overshoot circuit configured to generate the first overshoot current in response to the control signal;

wherein the combiner is further configured to combine the first overshoot current with the baseline current signal and the second overshoot current signal.

14. The circuit of claim 12 , wherein the second overshoot current circuit is configured to invert the input data signal, to filter the input data signal, and to differentiate the input data signal, and to delay the input data signal to provide the second overshoot current signal.

15. The circuit of claim 9 , wherein the write current generator comprises:

a current generator configured to generate the second overshoot current in response to the write command;

a current generator configured to generate the first steady state current in response to the write command, wherein the first steady state current is delayed relative to the second overshoot current.

16. A device comprising:

a write current generator configured to perform the following to write a single magnetic transition:

generate a first steady state current and a second steady state current that has an opposite polarity of the first steady state current;

generate a first overshoot current that has a larger magnitude than the first steady state current and a second overshoot current that also has a larger magnitude than the first steady state current, the first and second overshoots both having a same polarity as the first steady state current;

apply the first overshoot current, the first steady state current, the second overshoot current, and the second steady state current in the following specific order:

apply the first overshoot current;

apply the first steady state current;

apply the second overshoot current; and then switch to

apply the second steady state current to write the single magnetic transition on a data storage medium.

17. The device of claim 16 further comprising the write current generator configured to:

generate a third overshoot current having a same polarity as the second steady state current and has a larger magnitude than the second steady state current; and

apply the third overshoot current after applying the second overshoot circuit and prior to applying the second steady state current.

18. The circuit of claim 16 wherein the write current generator further comprises:

a first current generator for generating the first overshoot signal;

a second current generator for generating the first steady state signal;

a third current generator for generating the second overshoot signal; and

a combiner coupled to the first current generator, the second current generator, and the third current generator, the combiner configured to sum the first overshoot signal, the first steady state signal, and the second overshoot signal.

19. The device of claim 18 wherein the write current generator further comprises a time delay element and wherein the write current generator is further configured to apply a time delay to the second overshoot signal.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Jul 23, 2025
From: THE BANK OF NOVA SCOTIA
To: SEAGATE TECHNOLOGY PUBLIC LIMITED COMPANY; SEAGATE TECHNOLOGY; SEAGATE TECHNOLOGY HDD HOLDINGS; I365 INC.; SEAGATE TECHNOLOGY LLC; SEAGATE TECHNOLOGY INTERNATIONAL; SEAGATE HDD CAYMAN; SEAGATE TECHNOLOGY (US) HOLDINGS, INC.
Reel/Frame 072193/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS Recorded Jul 19, 2013
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT AND SECOND PRIORITY REPRESENTATIVE
To: SEAGATE TECHNOLOGY LLC; EVAULT INC. (F/K/A I365 INC.); SEAGATE TECHNOLOGY INTERNATIONAL; SEAGATE TECHNOLOGY US HOLDINGS, INC.
Reel/Frame 030833/0001 →
SECURITY AGREEMENT Recorded Mar 24, 2011
From: SEAGATE TECHNOLOGY LLC
To: THE BANK OF NOVA SCOTIA, AS ADMINISTRATIVE AGENT
Reel/Frame 026010/0350 →
RELEASE Recorded Jan 19, 2011
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: SEAGATE TECHNOLOGY HDD HOLDINGS; MAXTOR CORPORATION; SEAGATE TECHNOLOGY LLC; SEAGATE TECHNOLOGY INTERNATIONAL
Reel/Frame 025662/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2009
From: MAXTOR CORPORATION
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 022893/0855 →
SECURITY AGREEMENT Recorded May 15, 2009
From: MAXTOR CORPORATION; SEAGATE TECHNOLOGY LLC; SEAGATE TECHNOLOGY INTERNATIONAL
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND FIRST PRIORITY REPRESENTATIVE; WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT AND SECOND PRIORITY REPRESENTATIVE
Reel/Frame 022757/0017 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2007
From: BENKALI, MOURAD; OLSEN, RICHARD E; WOLFSON, JASON; KAYA, AHMET
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 019079/0267 →
Continuity (3)
Provisional Application 6074130300 · Dec 1, 2005
Provisional Application 6077233500 · Feb 10, 2006
Related Publication 20070165320A1 · Jul 19, 2007