IP Library Granted Patent US 7,812,413
Granted Patent B2
US 7,812,413 · App. 12/233,286 · Granted Oct 12, 2010

MOSFET devices and methods for making them

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Quick Facts
Patent No.
US 7,812,413
App. No.
12/233,286
Granted
Oct 12, 2010
Kind
B2
Abstract

A semiconductor device is disclosed. The device comprises a first MOSFET transistor. The transistor comprises a substrate, a first high-k dielectric layer upon the substrate, a first dielectric capping layer upon the first high-k dielectric, and a first gate electrode made of a semiconductor material of a first doping level and a first conductivity type upon the first dielectric capping layer. The first dielectric capping layer comprises Scandium.

Claims (33)

1. A semiconductor device comprising a first MOSFET comprising:

a substrate,

a first high-k dielectric layer upon the substrate,

a first dielectric capping layer upon the first high-k dielectric, and

a first gate electrode made of a semiconductor material of a first doping level and a first conductivity type upon the first dielectric capping layer,

wherein the first dielectric capping layer is made from a Sc-based material and is less than 2 nm in thickness.

2. The semiconductor device of claim 1 , further comprising a second MOSFET comprising

the substrate,

a second high-k dielectric layer upon the substrate,

a second dielectric capping layer upon the second high-k dielectric, and

a second gate electrode, made of a semiconductor material of a second doping level and a second conductivity type, upon the second dielectric capping layer,

wherein the first dielectric capping layer and the second dielectric capping layer have the same thickness and the same material composition.

3. The semiconductor device of claim 2 , wherein the second doping level is different than the first doping level.

4. The semiconductor device of claim 2 , wherein the second conductivity type is opposite to the first conductivity type.

5. The semiconductor device of claim 2 , wherein the first MOSFET is a nMOS transistor and the second MOSFET is a pMOS transistor.

6. The semiconductor device of claim 2 , wherein the first dielectric capping layer and the second dielectric capping layer are selected from the group consisting of Sc oxide, Sc silicate and mixtures thereof.

7. The semiconductor device of claim 6 , wherein the first dielectric capping layer and the second dielectric capping layer comprise Sc 2 O 3 .

8. The semiconductor device of claim 2 , wherein one or both of the first high-k dielectric layer and the second high-k dielectric layer are selected from the group consisting of SiON, Hf silicate, HfO 2 , ZrO 2 and mixtures thereof.

9. The semiconductor device of claim 2 , wherein the semiconductor material is polysilicon.

10. The semiconductor device of claim 1 , wherein the first dielectric capping layer is selected from the group consisting of Sc oxide, Sc silicate and mixtures thereof.

11. The semiconductor device of claim 10 , wherein the first dielectric capping layer comprises Sc 2 O 3 .

12. The semiconductor device of claim 1 , wherein the first high-k dielectric layer is selected from the group consisting of SiON, Hf silicate, HfO 2 , ZrO 2 and mixtures thereof.

13. The semiconductor device of claim 1 , wherein the semiconductor material is polysilicon.

14. A method for manufacturing a semiconductor device comprising a first MOSFET and a second MOSFET, applied to a substrate comprising first and second region, the method comprising:

depositing a layer of high-k dielectric overlying the first and the second regions of the substrate,

depositing a dielectric capping layer overlying the high-k dielectric,

depositing a semiconductor material overlying the dielectric capping layer, and

doping the semiconductor material to achieve a first conductivity type on the first region and a second conductivity type on the second region, wherein the dielectric capping layer is made of a Sc-based material and is less than 2 nm in thickness.

15. The method of claim 14 , wherein the second conductivity type is opposite to the first conductivity type.

16. The method of claim 14 , wherein the first MOSFET is a nMOS transistor and the second MOSFET is a pMOS transistor.

17. The method of claim 14 , wherein the semiconductor material is polysilicon.

18. The method of claim 14 , wherein the dielectric capping layer is selected from the group consisting of Sc oxide, Sc silicate and mixtures thereof.

19. The method of claim 14 , wherein the dielectric capping layer consists of Sc 2 O 3 .

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2009
From: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM
To: IMEC
Reel/Frame 023419/0185 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2008
From: CHANG, SHIH-HSUN; RAGNARSSON, LARS-AKE
To: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM; TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 021980/0320 →