IP Library › Granted Patent US 7,826,495
Granted Patent B2
US 7,826,495 · App. 12/046,278 · Granted Nov 2, 2010

Method, Ethernet device and Ethernet for clock synchronization

Assignee: Huawei Technologies Co., Ltd.
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Quick Facts
Patent No.
US 7,826,495
App. No.
12/046,278
Granted
Nov 2, 2010
Kind
B2
Abstract

The present invention discloses a method and Ethernet device for clock synchronization, a method for clock synchronization in an entire Ethernet, and the relevant Ethernet. The method for clock synchronization in an Ethernet device includes: the PHY layer unit of the Ethernet device extracts a clock from the data sent by the receive unit; the MAC layer unit makes adjustments to the extracted clock according to the local clock and takes the adjusted clock as the transmit clock of the Ethernet device. The method for clock synchronization in an entire Ethernet includes: clocks of all Ethernet devices are synchronized to the clock generated by the Ethernet device at the highest level. The invention provides a method for clock synchronization so that sending and receiving of clocks in Ethernet devices can be synchronized and clock synchronization can be realized in the entire Ethernet.

Claims (48)

1. A method for synchronizing a clock of an Ethernet device, comprising:

receiving, by an optical module of a first Ethernet device, data sent by a second Ethernet device;

extracting, by a PHY layer unit of the first Ethernet device, a clock from the data;

sending, by the PHY layer unit, the clock to a MAC layer unit of the first Ethernet device; and

adjusting, by the MAC layer unit, the clock according to a local clock and taking the adjusted clock as a transmit clock of the first Ethernet device.

2. The method of claim 1 , wherein the receiving, by the optical module, data from the second Ethernet device and the extracting, by the PHY layer unit, the clock from the data comprises:

receiving, by an electrical/optical interface, the data sent by the second Ethernet device, wherein the optical module comprises the electrical/optical interface;

sending, by the electrical/optical interface, the data to the PHY layer unit through a serial-to-parallel conversion (SERDES) line; and

recovering, by the PHY layer unit, the clock of the SERDES line based on the transient 0 and 1 in a serial data stream by clock and data recovery (CDR).

3. A method for clock synchronization in an entire Ethernet, comprising:

synchronizing, by a first Ethernet device, its local clock to the clock of a second Ethernet device at an upper neighboring level according to the method of claim 2 ;

synchronizing, by a third Ethernet device at a lower neighboring level, its local clock to the clock of the first Ethernet device according to the method of claim 2 .

4. An Ethernet, comprising a first Ethernet device at a level and a second Ethernet device at an upper neighboring level,

wherein the first Ethernet device synchronizes its clock to the clock of the second Ethernet device according to the method of claim 2 .

5. The method of claim 1 wherein the sending the clock to a MAC layer unit of the first Ethernet device comprises:

sending the clock extracted from the data to the MAC layer unit through an Ethernet interface.

6. The method of claim 5 , wherein the adjusting the clock according to the local clock comprises:

making, by the MAC layer unit, adjustment to the clock, wherein the adjustment is frequency justification or jitter elimination.

7. The method of claim 6 , wherein the adjusting the clock according to the local clock further comprises:

adjusting a phase of the clock received from the PHY layer unit.

8. A method for clock synchronization in an entire Ethernet, comprising:

synchronizing, by a first Ethernet device, its local clock to the clock of a second Ethernet device at an upper neighboring level according to the method of claim 1 ;

synchronizing, by a third Ethernet device at a lower neighboring level, its local clock to the clock of the first Ethernet device according to the method of claim 1 .

9. The method of claim 8 , further comprising:

determining a fourth Ethernet device at the highest level, which takes the clock generated by itself as its local clock; and

sending data, by the fourth Ethernet device, to an Ethernet device at a lower neighboring level of the fourth Ethernet device.

10. An Ethernet device, comprising:

a receive unit, adapted to receive data sent to the Ethernet device from a second Ethernet device;

a PHY layer unit, adapted to receive data from the receive unit, extract a clock from the data and send the clock to a MAC layer unit; and

the MAC layer unit, adapted to adjust the clock received from the PHY layer unit according to a local clock and take the adjusted clock as a transmit clock of the Ethernet device.

11. The Ethernet device of claim 10 , wherein:

the receive unit sends data to the PHY layer unit through a serial-to-parallel conversion (SERDES) line; and

the PHY layer unit extracts the clock of the SERDES line based on the transient 0 and 1 in a serial data stream by clock and data recovery (CDR).

12. The Ethernet device of claim 10 , wherein:

the PHY layer unit sends the clock extracted from the data to the MAC layer unit through an Ethernet interface.

13. The Ethernet device of claim 12 , wherein:

the MAC layer unit makes an adjustment to clock received from the PHY layer unit, the adjustment including frequency justification or jitter elimination.

14. The Ethernet device of claim 13 , wherein:

the MAC layer unit further adjusts a phase of the clock received from the PHY layer unit.

15. An Ethernet, comprising a first Ethernet device at a level and a second Ethernet device at an upper neighboring level, wherein:

the first Ethernet device synchronizes its clock to the clock of the second Ethernet device according to the method of claim 1 .

16. The Ethernet of claim 15 , further comprising a third Ethernet device; wherein:

the third Ethernet device at the lower neighboring level synchronizes its clock to the clock of the first Ethernet device according to the method of claim 1 .

17. The Ethernet of claim 16 , wherein the second Ethernet device takes a clock generated by itself as its clock if the second Ethernet device is located at the highest level.

18. The Ethernet of claim 15 , wherein the first Ethernet device comprises:

a receive unit, adapted to receive data sent to the first Ethernet device from the second Ethernet device;

a PHY layer unit, adapted to receive data from the receive unit, extract a clock from the data and send the clock to a MAC layer unit; and

the MAC layer unit, adapted to adjust the clock received from the PHY layer unit according to a local clock and take the adjusted clock as a transmit clock of the first Ethernet device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2008
From: DENG, CHAOJUN; YE, JINHUA
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 020640/0075 →
Priority Claims (1)
CN 2005 1 0102697 · Sep 13, 2005 · national
Continuity (2)
Continuation PCTCN200600229500 · Sep 6, 2006
Related Publication 20080159330A1 · Jul 3, 2008