Memory device and data reading method
A memory device and a memory data reading method are provided. The memory device may include: a multi-bit cell array; a programming unit that stores N data pages in a memory page in the multi-bit cell array; and a control unit that divides the N data pages into a first group and second group, reads data of the first group from the memory page, and determines a scheme of reading data of the second group from the memory page based on the read data of the first group.
1. A memory device comprising:
a multi-bit cell array;
a programming unit that multi-bit programs a plurality of data pages in a memory page in the multi-bit cell array; and
a control unit that divides the plurality of data pages into a first group and a second group, reads data of the first group from the memory page using a first read scheme, and reads data of the second group from the memory page using a second read scheme,
wherein the first read scheme is different from the second read scheme, and
wherein the plurality of data pages includes N data pages, and the control unit determines the scheme of reading data of the second group from the memory page based on the read data of the first group.
2. The memory device of claim 1 , wherein the control unit determines a read voltage level based on the read data of the first group, the read voltage level being used to read the data of the second group.
3. The memory device of claim 1 , wherein the control unit estimates a change of a threshold voltage of multi-bit cells in the multi-bit cell array based on a Floating Gate (FG) coupling mechanism to determine the read voltage level used to read the data of the second group.
4. The memory device of claim 1 , wherein the control unit estimates a change of a threshold voltage of multi-bit cells in the multi-bit cell array based on a charge loss mechanism to determine the read voltage level used to read the data of the second group.
5. The memory device of claim 1 , wherein the control unit sets each of a plurality of result values of the read data of the first group as one symbol among a plurality of symbols, divides the plurality of symbols into a plurality of symbol groups, and assigns a single read voltage level with respect to each of the plurality of symbol groups, the read voltage level being used to read the data of the second group.
6. The memory device of claim 1 , wherein N-bit data is stored in each multi-bit cell of the memory page, and the programming unit stores the N data pages using a maximum of 2N verify voltage levels in the memory page.
7. The memory device of claim 6 , wherein the programming unit controls a Bit Error Rate (BER) of the data of the first group by adjusting a distance between the 2N verify voltage levels.
8. The memory device of claim 6 , wherein, when the first group includes (N−1) data pages, the programming unit selects the 2N verify voltage levels to enable a number of read voltage levels to be less than 2(N−1), the read voltage level being used when the control unit reads each of the (N−1) data pages of the first group.
9. The memory device of claim 1 , wherein the control unit Error Control Code (ECC)-decodes the read data of the first group, and determines a scheme of reading the data of the second group from the memory page based on the first ECC-decoded data of the first group.
10. The memory device of claim 9 , wherein the control unit reads the data of the second group, and second ECC-decodes the read data of the second group, the second ECC-decoding being different from the first ECC-decoding.
11. A memory data reading method which reads a plurality of data pages from a memory page including multi-bit cells, comprising:
dividing the plurality of data pages into a first group and a second group;
reading data of the first group from the memory page;
determining read voltage levels based on the read data of the first group, the read voltage levels being used to read data of the second group from the memory page;
detecting a threshold voltage of the multi-bit cells of the memory page; and
comparing the detected threshold voltage and the read voltage levels and determining the data of the second group.
12. The memory data reading method of claim 11 , wherein the determining of the read voltage levels includes:
setting each of a plurality of result values of the read data of the first group as one symbol among a plurality of symbols, and dividing the plurality of symbols into a plurality of symbol groups; and
determining a single read voltage level with respect to each of the plurality of symbol groups, the read voltage level being used to read the data of the second group.
13. A computer-readable recording medium storing a program for implementing a memory data reading method of reading a plurality of data pages from a memory page including multi-bit cells, comprising:
dividing the plurality of data pages into a first group and a second group;
reading data of the first group from the memory page;
determining read voltage levels based on the read data of the first group, the read voltage levels being used to read data of the second group from the memory page;
detecting a threshold voltage of the multi-bit cells of the memory page; and
comparing the detected threshold voltage and the read voltage levels and determining the data of the second group.