High efficiency power amplifier having embedded switching
A power amplifier includes at least one amplification path comprising at least a first amplification device and a second amplification device, where the first amplification device has a common control terminal to provide amplification when biased on and to prevent conduction of a signal through the amplification path when biased off.
1. A power amplifier, comprising:
at least one amplification path comprising at least a first amplification device and a second amplification device, where the first amplification device has a common control terminal to provide amplification when biased on and to operate as a series-type single-pole single-throw switch to prevent conduction of a signal through the amplification path when biased off.
2. The power amplifier of claim 1 , in which the second amplification device has a common control terminal to provide amplification when biased on and to prevent conduction of a signal through the amplification path when biased off.
3. The power amplifier of claim 1 , in which the first amplification device in the amplification path functions as an open circuit when biased off.
4. The power amplifier of claim 2 , in which the second amplification device in the amplification path functions as an open circuit when biased off.
5. The power amplifier of claim 2 , in which the first amplification device and the second amplification device are bipolar transistor devices configured in a common base arrangement.
6. The power amplifier of claim 2 , in which the first amplification device and the second amplification device are field effect transistor devices configured in a common gate arrangement.
7. A power amplifier, comprising:
a plurality of amplification paths, each amplification path comprising at least a first amplification device and a second amplification device, where the first amplification device in each amplification path has a common control terminal to provide amplification when biased on and to operate as a series-type single-pole single-throw switch to prevent conduction of a signal through the amplification path when biased off.
8. The power amplifier of claim 7 , in which the second amplification device in each amplification path has a common control terminal to provide amplification when biased on and to prevent conduction of a signal through the amplification path when biased off.
9. The power amplifier of claim 7 , in which the first amplification device in each amplification path functions as an open circuit when biased off.
10. The power amplifier of claim 8 , in which the second amplification device in each amplification path functions as an open circuit when biased off.
11. The power amplifier of claim 8 , in which the first amplification device and the second amplification device are bipolar transistor devices configured in a common base arrangement.
12. The power amplifier of claim 8 , in which the first amplification device and the second amplification device are field effect transistor devices configured in a common gate arrangement.
13. A power amplifier, comprising:
a first amplification path comprising:
at least a first amplification device and a second amplification device, the first amplification device configured to receive a radio frequency (RF) input signal, the first amplification device configured in a common base arrangement;
a first bias control element configured to provide a bias signal to at least the first amplification device;
where the first amplification device provides amplification when biased on and operates as a series-type single-pole single-throw switch to prevent conduction of a signal through the first amplification path when biased off;
a second amplification path comprising:
at least a first amplification device and a second amplification device, the first amplification device configured to receive the radio frequency (RF) input signal, the first amplification device configured in a common base arrangement;
a second bias control element configured to provide a bias signal to at least the first amplification device; and
where the first amplification device provides amplification when biased on and operates as a series-type single-pole single-throw switch to prevent conduction of a signal through the first amplification path when biased off.
14. The power amplifier of claim 13 , in which the second amplification device in the first amplification path and in the second amplification path is arranged in a common base arrangement to provide amplification when biased on and to prevent conduction of a signal through the amplification path when biased off.
15. The power amplifier of claim 14 , in which the second amplification device in the first amplification path and in the second amplification path functions as a single-pole, single throw switch when biased off.