IP Library Granted Patent US 7,868,432
Granted Patent B2
US 7,868,432 · App. 11/672,728 · Granted Jan 11, 2011

Multi-chip module for battery power control

Assignee: Fairchild Semiconductor Corporation
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Quick Facts
Patent No.
US 7,868,432
App. No.
11/672,728
Granted
Jan 11, 2011
Kind
B2
Abstract

A multi-chip module suitable for use in a battery protection circuit. The multi-chip module includes an integrated circuit chip, a first power transistor, a second power transistor, a first connection structure electrically coupling the integrated circuit chip to the first power transistor, a second connection structure electrically coupling the integrated circuit chip to the second power transistor, and a leadframe structure comprising a first lead, a second lead, a third lead and a fourth lead, wherein the integrated circuit chip, the first power transistor, and the second power transistor are mounted on the leadframe structure. A molding material covers at least part of the integrated circuit chip, the first power transistor, the second power transistor, the first connection structure, and the second connection structure.

Claims (46)

1. A multi-chip module comprising:

a metal leadframe structure including a first lead, a second lead, a third lead, a fourth lead, and at least two independent die mounting pads electrically isolated from one another, the at least two independent die mounting pads including a first pad for mounting at least one integrated circuit chip and a second pad for mounting at least one transistor device chip;

an integrated circuit chip mounted on the first pad;

a first MOSFET transistor mounted on the second pad, the first MOSFET transistor having a gate electrode, a source electrode, and a drain electrode, the first MOSFET transistor being mounted so that its drain electrode faces the second pad and is electrically coupled to the second pad;

a second MOSFET transistor mounted on the second pad, the second MOSFET transistor having a gate electrode, a source electrode, and a drain electrode, the second MOSFET transistor being mounted so that its drain electrode faces the second pad and is electrically coupled to the second pad;

a first plurality of bonding wires having a first diameter connecting the integrated circuit chip to the first and second leads and to at least the gate electrodes of the first and second MOSFET transistors; and

a second plurality of bonding wires having a second diameter greater than the first diameter connecting the source electrodes of the first and second MOSFET transistors to the third and fourth leads, respectively; and

wherein said mounting pads are exposed on the back side of the module and wherein the module includes an epoxy molding material.

2. The module of claim 1 wherein the leadframe structure includes a dedicated test lead.

3. The module of claim 1 wherein at least one of the die mounting pads has no external leads, mounting pads, or other die mounting pads along both of two opposite sides of the pad.

4. A multi-chip module comprising:

an integrated circuit chip;

a first power transistor;

a second power transistor;

a first connection structure electrically coupling the integrated circuit chip to the first power transistor;

a second connection structure electrically coupling the integrated circuit chip to the second power transistor;

a leadframe structure comprising a first lead, a second lead, a third lead and a fourth lead, wherein the integrated circuit chip, the first power transistor, and the second power transistor are mounted on the leadframe structure;

a third connection structure electrically coupling the integrated circuit chip to the third lead;

a fourth connection structure electrically coupling the integrated circuit chip to the fourth lead, the fourth lead being separate from the third lead;

a molding material covering at least part of the integrated circuit chip, the first power transistor, the second power transistor, the first connection structure, and the second connection structure,

wherein the first lead provides an electrical connection to the first power transistor and the second lead provides an electrical connection to the second power transistor, and

wherein the first and second leads are at a first end of the multi-chip module, and the third and fourth leads are at a second end of the multi-chip module.

5. The multi-chip module of claim 4 wherein the leadframe further comprises a test lead and a bonding structure electrically coupling the test lead and the integrated circuit chip, and wherein the leads in the leadframe structure include only the test lead and the first, second, third, and fourth leads.

6. The multi-chip module of claim 4 wherein the multi-chip module has an elongated shape and an aspect ratio greater than 1.

7. The multi-chip module of claim 4 wherein the first power transistor and the second power transistor are in a single power chip and the first power transistor and the second power transistor are vertical power MOSFETs.

8. The multi-chip module of claim 4 wherein the first and second bonding structures are wires, and wherein the leadframe structure comprises a first die mounting pad and a second die mounting pad, the integrated circuit chip being mounted on the first die mounting pad and the first and second power transistors being present in one or more chips, the one or more chips being mounted on the second die mounting pad.

9. An electrical assembly comprising:

a circuit board; and

the multi-chip module of claim 4 mounted on the circuit board.

10. A system comprising:

the electrical assembly of claim 9 ; and

a rechargeable battery electrically coupled to the electrical assembly.

11. The multi-chip module of claim 8 wherein the leadframe structure further comprises a test lead electrically coupled to the integrated circuit chip.

12. The multi-chip module of claim 8 wherein an exterior surface of leadframe structure is exposed through the molding material.

13. A multi-chip module comprising:

an integrated circuit chip;

a first power transistor;

a second power transistor;

a first connection structure electrically coupling the integrated circuit chip to the first power transistor;

a second connection structure electrically coupling the integrated circuit chip to the second power transistor;

a leadframe structure comprising a first lead, a second lead, a third lead, a fourth lead, and a test lead, wherein the integrated circuit chip, the first power transistor, and the second power transistor are mounted on the leadframe structure;

a bonding structure electrically coupling the test lead and the integrated circuit chip; and

a molding material covering at least part of the integrated circuit chip, the first power transistor, the second power transistor, the first connection structure, and the second connection structure,

wherein the first lead provides an electrical connection to the first power transistor and the second lead provides an electrical connection to the second power transistor,

wherein the first and second leads are at a first end of the multi-chip module, and the third and fourth leads are at a second end of the multi-chip module, and

wherein the leads in the leadframe structure include only the test lead and the first, second, third, and fourth leads.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2010
From: LEE, JEONGIL; LEE, MYOUNGHO; DOSDOS, BIGILDIS; SUICO, CHARLES; LEE, EDWIN MAN FAI; LIM, DAVID CHONG SOOK; VILAS-BOAS, ADRIANO M.
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 025442/0600 →
Continuity (2)
Provisional Application 6077303400 · Feb 13, 2006
Related Publication 20070187807A1 · Aug 16, 2007