IP Library Granted Patent US 7,872,521
Granted Patent B2
US 7,872,521 · App. 12/360,131 · Granted Jan 18, 2011

CCD device and method of driving same

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Quick Facts
Patent No.
US 7,872,521
App. No.
12/360,131
Granted
Jan 18, 2011
Kind
B2
Abstract

Disclosed is a CCD device in which a charge transfer register of a CCD structure is connected to a charge detector via an output gate and has a reset gate between the charge detector and a reset drain, and an output gate pulse opposite in phase from a reset pulse applied to the reset gate is applied to the output gate. A dummy charge detector and an amplitude adjusting circuit are provided. On the basis of detection of the potential of a diffusion layer in the dummy charge detector, the amplitude adjusting circuit controls the amplitude of the output gate pulse applied to the output gate.

Claims (29)

1. A CCD device comprising:

a charge transfer register of a CCD structure;

an output gate;

a charge detector, to which the charge transfer register is connected via the output gate;

a reset gate arranged between the charge detector and a reset drain,

an output gate pulse opposite in phase from a reset pulse applied to the reset gate being applied to the output gate,

a detector unit that detects potential of the charge detector; and

an adjusting circuit that controls amplitude of the output gate pulse, which is applied to the output gate, based upon result of detection of the potential of the charge detector.

2. The device according to claim 1 , wherein the detector unit includes a dummy charge detector equivalent to the charge detector.

3. The device according to claim 1 , wherein the adjusting circuit receives the result of detection of potential of the charge detector and adjusts gain in accordance with the value of potential of the charge detector, the adjusting circuit controlling the amplitude of the output gate pulse, and supplying the pulse of the controlled amplitude to the output gate.

4. The device according to claim 2 , wherein the adjusting circuit includes:

a first transistor configured as a follower to produce a voltage that follows an input voltage; and

a second transistor constituting a follower load,

the first transistor receiving the output gate pulse,

a bias voltage, which conforms to the potential detected by the dummy charge detector, being applied to the second transistor.

5. The device according to claim 1 , wherein when potential of a diffusion layer of the charge detector varies in an increasing direction and the amplitude of the reset gate after the charge detector is in a floating state decreases, the adjusting circuit decreases the amplitude of the output gate pulse; and

when the potential of the diffusion layer of the charge detector varies in a decreasing direction and the amplitude of the reset gate after the charge detector is in the floating state increases, the adjusting circuit increases the amplitude of the output gate pulse.

6. A method of driving a CCD device in which a charge transfer register of a CCD structure is connected to a charge detector via an output gate and has a reset gate between the charge detector and a reset drain, the method comprising:

applying an output gate pulse opposite in phase from a reset pulse, which is applied to the reset gate, to the output gate;

detecting potential of the charge detector; and

controlling amplitude of the output gate pulse based upon result of detection of the potential of the charge detector.

7. The method according to claim 6 , comprising

detecting, by a dummy charge detector equivalent to the charge detector, the potential of the charge detector.

8. The method according to claim 6 , further comprising:

responsive to result of detection of the potential of the charge detector, adjusting gain in accordance with the value of potential of the charge detector to control the amplitude of the output gate pulse; and

supplying the pulse of the controlled amplitude to the output gate.

9. The method according to claim 6 , further comprising:

decreasing the amplitude of the output gate pulse, when potential of a diffusion layer of the charge detector varies in an increasing direction and the amplitude of the reset gate after the charge detector is in a floating state decreases; and

increasing the amplitude of the output gate pulse, when the potential of the diffusion layer of the charge detector varies in a decreasing direction and the amplitude of the reset gate after the charge detector is in the floating state increases.

Assignments (2)
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2009
From: TSUZUKI, TAKAO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022158/0235 →