Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics

1. A reconfigurable fabric for use in an integrated circuit device, the fabric comprising:

an embedded array comprised solely of asynchronous logic elements, said asynchronous logic elements being programmable to carry out logic operations on signals provided at asynchronous logic element inputs and to asynchronously provide operation results at asynchronous logic element outputs, wherein at least one of said asynchronous logic elements include at least one multiplier unit directly coupled to at least one memory unit.

2. An integrated circuit including a reconfigurable logic fabric comprising:

an embedded array of asynchronous logic elements, said asynchronous logic elements being programmable to carry out logic operations on signals provided at asynchronous logic element inputs and to provide operation results at asynchronous logic element outputs, wherein at least one of said asynchronous logic elements include at least one multiplier unit directly coupled to at least one memory unit; and

a programmable input/output block coupling said asynchronous logic element inputs and said asynchronous logic element outputs to external circuits, said external circuits being external to said integrated circuit, said programmable input/output block being programmable for synchronous operation with said external circuits.

3. The integrated circuit of claim 2 , wherein said at least one multiplier unit and said at least one memory unit are coupled by an interconnecting grid.

4. The integrated circuit of claim 2 , wherein said at least one multiplier unit and said at least one memory unit are selectably coupled by first and second connections comprising respectively a direct connection and an interconnecting grid.

5. The integrated circuit of claim 4 , wherein said reconfigurable logic fabric further comprises at least one programmable connection unit for selecting between said direct connection and said interconnecting grid.

6. The integrated circuit of claim 2 , wherein said at least one multiplier unit and said at least one memory unit are programmable.

7. The integrated circuit of claim 2 , wherein said programmable input/output block comprises at least one converter unit having a converter input coupled to said asynchronous logic element outputs to receive said operation results, the at least one converter unit providing said operation results synchronously at a converter unit output.

8. The integrated circuit of claim 2 , wherein said programmable input/output block comprises at least one converter unit having a converter input coupled to said asynchronous logic element outputs to receive said operation results, the at least one converter unit providing said operation results asynchronously at a converter unit output.

9. The integrated circuit of claim 8 , wherein said converter unit output is coupled to a buffer register, said buffer register being configured to accumulate and store said operation results, and said buffer register including a control input for stepped operation of said buffer register such that said operation results are provided to said external circuits in a stepped manner to enable troubleshooting of said integrated circuit.

10. The integrated circuit of claim 2 , wherein said asynchronous logic elements further include a plurality of reconfigurable logic blocks (RLBs), each RLB comprising at least one logic cluster, the at least one logic cluster comprising at least one look-up table (LUT), and the at least one LUT including inputs comprising at least some of said asynchronous logic element inputs.

11. An integrated circuit including an asynchronous semiconductor fabric comprising:

a plurality of asynchronous logic units programmable to perform asynchronous logic operations on signals provided at logic unit inputs and to provide asynchronous logic operation results at logic unit outputs, wherein at least one of said asynchronous logic units include at least one multiplier unit directly coupled to at least one memory unit; and

a plurality of programmable logic unit interfaces coupling said asynchronous logic units to external circuits, said external circuits being external to said semiconductor fabric, wherein at least one of said programmable logic unit interfaces is programmable to provide said logic operation results to said external circuits to enable said semiconductor fabric to be operatively coupled to synchronous devices.

12. The integrated circuit of claim 11 , wherein at least one of said at least one multiplier unit or said at least one memory unit are programmable.

13. The reconfigurable fabric of claim 1 , wherein said asynchronous logic elements further include a plurality of reconfigurable logic blocks (RLBs).

14. The reconfigurable fabric of claim 13 , wherein at least one of the RLBs comprise at least one logic cluster.

15. The reconfigurable fabric of claim 14 , wherein the at least one logic cluster includes at least one look up table (LUT) that comprises at least some of said asynchronous logic element inputs.

16. The reconfigurable fabric of claim 13 , wherein at least one of the RLBs can be configured as a conditional unit.