Trench IGBT with trench gates underneath contact areas of protection diodes

1. A trench semiconductor device comprising an electrostatic discharge (ESD) protection Zener diode having at least an anode trenched contact disposed right above the center of one buffer trenched gate underneath said ESD protection Zener diode and at least a cathode trenched contact disposed right above the center of another buffer trenched gate underneath said ESD protection Zener diode to prevent a shortage between said anode and cathode of said ESD protection Zener diode;

said anode trenched contact and said cathode trenched contact having a trench width not greater than said buffer trenched gates;

an insulating layer disposed between said ESD protection Zener diode and said buffer trenched gates; and

said buffer trenched gates comprising a single doped polysilicon layer filled into said trenched gates and padded with a gate oxide layer.

2. The trench semiconductor device of claim 1 , wherein said ESD protection Zener diode comprises multiple back-to-back doped regions in a polysilicon layer doped with dopant ions of a first conductivity type next to a second conductivity type disposed on said insulation layer above said trench semiconductor device.

3. The trench semiconductor device of claim 1 is a trench IGBT, wherein said trench MST comprises a Punch-Through type IGBT and said ESD protection Zener diode comprises multiple back-to-back doped regions in said polysilicon layer doped with N+ dopant ions next to P dopant ions disposed on said insulation layer above said trench IGBT.

4. The trench semiconductor device of claim 1 is a trench IGBT, wherein said trench IGBT comprises a Non-Punch-Through type IGBT and said ESD protection Zener diode comprises multiple back-to-back doped regions in said polysilicon layer doped with N+ dopant ions next to P dopant ions disposed on said insulation layer above said trench IGBT.

5. The trench semiconductor device of claim 1 , wherein said anode trenched contact and cathode trenched contacts are spaced apart from said buffer trenched gates underneath an anode trenched contact and cathode trenched contact contact area.

6. The trench semiconductor device of claim 1 , wherein said anode trenched contact and cathode trenched contacts penetrate through said insulating layer and touch said buffer trenched gates underneath an anode trenched contact and cathode trenched contact contact area.

7. The trench semiconductor device of claim 1 , further comprising a plurality of n+ regions next to p doped regions.

8. A trench IGBT comprising a Zener diode connected between a gate metal and a collector metal of said trench IGBT as a gate-collector (G-C) clamp diode wherein said G-C clamp diode has trench gates underneath contact areas of said G-C diode and at least an anode trenched contact disposed right above the center of one buffer trenched gate underneath said G-C clamp diode and at least a cathode trenched contact disposed right above the center of another buffer trenched gate underneath said G-C clamp diode to prevent a shortage between said anode and cathode of said G-C clamp diode;

said anode trenched contact and said cathode trenched contact have a trench width not greater than said buffer trenched gates;

an insulating layer disposed between said G-C clamp diode and said buffer trenched gates; and

said buffer trenched gates comprise a single doped polysilicon layer filled into said trenched gates padded with a gate oxide layer.

9. The trench IGBT of claim 8 , wherein said G-C clamp diode comprises multiple back-to-back doped regions in a polysilicon layer doped with dopant ions of a first conductivity type next to a second conductivity type disposed on said insulation layer above said trench IGBT.

10. The trench IGBT of claim 8 , wherein said trench IGBT comprises a Punch-Through type IGBT and said G-C clamp diode comprises multiple back-to-back doped regions in said polysilicon layer doped with N+ dopant ions next to P dopant ions disposed on said insulation layer above said trench IGBT.

11. The trench IGBT of claim 8 , wherein said trench IGBT comprises a Non-Punch-Through type IGBT and said G-C clamp diode comprises multiple back-to-back doped regions in said polysilicon layer doped with N+ dopant ions next to P dopant ions disposed on said insulation layer above said trench IGBT.

12. The trench semiconductor device of claim 8 , wherein said anode trenched contact and cathode trenched contacts are spaced apart from said buffer trenched gates underneath an anode trenched contact and cathode trenched contact contact area.

13. The trench semiconductor device of claim 8 , wherein said anode trenched contact and cathode trenched contacts penetrate through said insulating layer and touch said buffer trenched gates underneath an anode trenched contact and cathode trenched contact contact area.

14. The trench IGBT of claim 8 , further comprising a plurality of n+ regions next to p doped regions.

15. A trench IGBT comprising a G-E Protection Zener diode connected between a gate metal and an emitter metal of said trench IGBT and a G-C clamp Zener diode connected between said gate metal and a collector metal of said trench IGBT;

both said G-E protection Zener diode and said G-C clamp Zener diode have at least one trenched anode contact and at least one trenched cathode contact;

each of said trenched anode contact and said trenched cathode contact are disposed right above the center of a buffer trenched gate underneath said G-E protection Zener diode or G-C clamp Zener diode;

said trenched anode and cathode contacts of said G-E protection Zener diode and said G-C clamp diodes have a trench width not greater than said buffer trenched gates underneath said G-E protection diode or said G-C clamp diode;

an insulating layer disposed between said G-E protection Zener diode and said buffer trenched gates;

said insulating layer disposed between said G-C clamp Zener diode and said buffer trenched gates;

said buffer trenched gates comprising a single doped polysilicon layer filled into said trenched gates padded with a gate oxide layer.

16. The trench IGBT of claim 15 , wherein said G-E protection and G-C clamp diodes comprise multiple back-to-back doped regions in a polysilicon layer doped with dopant ions of a first conductivity type next to a second conductivity type disposed on said insulation layer above said trench IGBT.

17. The trench IGBT of claim 15 , wherein said trench IGBT comprises a Punch-Through type IGBT and said G-E protection and G-C clamp diodes comprise multiple back-to-back doped regions in said polysilicon layer doped with N+ dopant ions next to P dopant ions disposed on said insulation layer above said trench IGBT.

18. The trench IGBT of claim 15 , wherein said trench IGBT comprises a Non-Punch-Through type IGBT and said G-E protection and G-C clamp diodes comprise multiple back-to-back doped regions in said polysilicon layer doped with N+ dopant ions next to P dopant ions disposed on said insulation layer above said trench IGBT.

19. The trench semiconductor device of claim 15 , wherein said anode trenched contact and cathode trenched contacts are spaced apart from said buffer trenched gates underneath an anode trenched contact and cathode trenched contact contact area.

20. The trench semiconductor device of claim 15 , wherein said anode trenched contact and cathode trenched contacts penetrate through said insulating layer and touch said buffer trenched gates underneath an anode trenched contact and cathode trenched contact contact area.

21. The trench IGBT of claim 15 , further comprising a plurality of n+ regions next to p doped regions.