Granted Patent B2

US 7,899,303 · App. 11/497,890 · Granted Mar 1, 2011

Assignee: LSI Corporation

Abstract

Claims (57)

1. A method for transitioning a video system, comprising the steps of:

(A) executing in a processing circuit a standby code stored in a nonvolatile memory while said video system is in an off state, said off state defining a low power configuration for said processing circuit and a power off condition for said video system, said standby code being responsive to a plurality of wake up conditions to wake up said video system;

(B) storing an application code in a volatile memory while in said off state, said application code configured to operate said video system while in an on state of said video system;

(C) transitioning from said off state to said on state upon detection of at least one of said wake up conditions;

(D) executing in said processing circuit said application code while in said on state to decode video; and

(E) increasing a frequency of a system clock used by said processing circuit before said transitioning.

2. The method according to claim further comprising the step of:

enabling a non-system clock before said transitioning.

3. The method according to claim 1 , further comprising the step of:

removing said nonvolatile memory from a self-refresh condition before said transitioning.

4. The method according to claim 1 , further comprising the step of:

enabling a data cache in said processing circuit before said transitioning.

5. The method according to claim 1 , further comprising the step of:

enabling a plurality of interrupts in said processing circuit before said transitioning.

6. The method according to claim 1 , further comprising the step of:

recording a program guide received from an external source into said nonvolatile memory while in said off state.

7. The method according to claim 1 , further comprising the step of:

adjusting a time value while in said off state in response to a broadcast time stamp received from an external source.

8. The method according to claim 1 , further comprising the steps of:

generating a compressed signal by encoding an input video signal;

storing said compressed signal; and

generating an output video signal by decoding said compressed signal.

9. The method according to claim 1 , further comprising the steps of:

disabling a plurality of interrupts to said processing circuit;

placing said volatile memory in a self-refresh condition;

disabling a data cache of said processing circuit;

disabling a non-system clock; and

reducing a frequency of said system clock upon entering said off state.

10. A system comprising:

a nonvolatile memory configured to store a standby code, said standby code being responsive to a plurality of wake up conditions to wake up said system;

a volatile memory configured to store an application code while in an off state of said system, said application code configured to operate said system while in an on state of said system;

a processing circuit configured to (i) execute said standby code while in said off state, said off state defining a low power configuration of said processing circuit and a power off condition of said system, (ii) transition from said off state to said on state upon detection of at least one of said wake up conditions and (iii) execute said application code while in said on state to decode video; and

a clock circuit configured to generate a system clock having (i) a first frequency and a second frequency while in said off state and (ii) a third frequency while in said on state.

11. The system according to claim 10 , wherein said clock circuit comprises a phase lock loop configured to selectively (i) frequency multiply said system clock while in said on state and (ii) pass said system clock while in said off state.

12. The system according to claim 10 , wherein said clock circuit comprises a clock divider configured to selectively (i) frequency divide said system clock and (ii) pass said system clock under control of said standby code.

13. The system according to claim 10 , further comprising real time clock generating a real time value adjustable by said processing circuit.

14. The system according to claim 13 , further comprising a display driven from said processing circuit and configured to show a real time value while in said off state.

15. The system according to claim 10 , wherein said standby code operates independently of an operating system executed by said processing circuit while in said on state.

16. The system according to claim 10 , further comprising an interface code configured to initiate said transition from said on state to said off state by a single call from said application code.

17. The system according to claim 16 , wherein said interface code is further configured to perform a call return upon transitioning from said off state to said on state.

18. A system comprising:

means for reading from a nonvolatile memory a standby code, said standby code being responsive to a plurality of wake up conditions to wake up said system;

means for reading from a volatile memory an application code while in an off state of said system, said application code configured to operate said system while in an on state of said system;

means for processing configured to (i) execute said standby code while in said off state, said off state defining a low power configuration of said means for processing and a power off condition of said system, (ii) transition from said off state to said on state upon detection of at least one of said wake up conditions and (iii) execute said application code while in said on state to decode video; and

means for increasing a frequency of a system clock used by said processing circuit before said transitioning.

19. A method for transitioning a video system, comprising the steps of:

(A) executing in a processing circuit a standby code stored in a nonvolatile memory while said video system is in an off state, said off state defining a low power configuration for said processing circuit and a power off condition for said video system, said standby code being responsive to a plurality of wake up conditions to wake up said video system;

(B) storing an application code in a volatile memory while in said off state, said application code configured to operate said video system while in an on state of said video system;

(C) transitioning from said off state to said on state upon detection of at least one of said wake up conditions;

(D) executing in said processing circuit said application code while in said on state to decode video; and

(E) enabling a non-system clock before said transitioning.

20. A method for transitioning a video system, comprising the steps of:

(A) executing in a processing circuit a standby code stored in a nonvolatile memory while said video system is in an off state, said off state defining a low power configuration for said processing circuit and a power off condition for said video system, said standby code being responsive to a plurality of wake up conditions to wake up said video system;

(B) storing an application code in a volatile memory while in said off state, said application code configured to operate said video system while in an on state of said video system;

(C) transitioning from said off state to said on state upon detection of at least one of said wake up conditions;

(D) executing in said processing circuit said application code while in said on state to decode video; and

(E) enabling a plurality of interrupts in said processing circuit before said transitioning.

Assignments (10)

Continuity (1)