Semiconductor device and method for manufacture
A semiconductor device is formed by forming a second trench 120 at the base of a first trench 18 , depositing insulator 124 at the base of the second trench 120 , and then etching cavities 26 laterally from the sidewalls of the second trench, but not the base which is protected by insulator 124 . The invention may in particular be used to form semiconductor devices with cavities under the active components, or by filling the cavities to form silicon on insulator or silicon on conductor devices.
1. A method of manufacturing a semiconductor device, comprising
providing a semiconductor body with opposed first and second major surfaces; etching a plurality of laterally spaced longitudinal first trenches from the first major surface towards the second major surface;
forming spacers on the sidewalls of the first trenches to protect at least part of the sidewalls of the trenches from etching; etching second trenches at the base of the first trenches;
forming an insulator on the base of the second trenches but not on the sidewalls of the second trenches; and
etching cavities starting at the sidewalls of the second trenches and extending laterally.
2. The method as recited in claim 1 , wherein forming insulator on the base of the second trenches includes:
depositing nitride on the sidewalls of the first and second trenches and the base of the second trenches;
carrying out a vertical etch to etch the nitride from the base of the second trenches,
forming oxide on the base of the second trenches, and then removing the nitride by a selective etch for nitride over oxide leaving oxide on the base of the second trench and the sidewalls of the second trench free of oxide and nitride.
3. The method as recited in claim 1 wherein, etching the cavities includes etching the cavities for sufficient time that cavities from adjacent trenches join.
4. A method as recited in claim 1 , comprising: forming a drain region on the first major surface and laterally spaced source regions on either side of the drain region; and defining an insulated gate to control conduction between source and drain regions through a body region; wherein etching the first trenches etches the first trenches through the drain region and/or the source regions; and etching the cavities includes etching the cavities to extend between the source and drain regions under the source, drain and body regions.
5. A method according to claim 4 wherein etching the first trenches etches the first trenches through the drain region; and etching the cavities includes etching the cavities from under the drain region to extend as far as under the source region.
6. A method according to claim 4 wherein etching the first trenches etches the first trenches through the source regions; and etching the cavities includes etching the cavities to extend from under each source region to meet under the drain region.
7. A method according to claim 1 further comprising filling the cavities.
8. A semiconductor device comprising: a semiconductor body with opposed first and second major surfaces; a plurality of laterally spaced longitudinal trenches extending from the first major surface towards the second major surface; cavities at the base of the trenches; and at least one electronic semiconductor component in the semiconductor body between the trenches, the at least one electronic semiconductor component being a transistor, a diode, a junction semiconductor device, or a combination, thereof; wherein the semiconductor device comprises an insulator at the base of the trenches, the cavities extending laterally from the sidewalls at the base of the trenches.