IP Library Granted Patent US 7,952,095
Granted Patent B2
US 7,952,095 · App. 12/208,371 · Granted May 31, 2011

Display device and manufacturing method therefor

Assignee: Hitachi Displays, Ltd.
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Quick Facts
Patent No.
US 7,952,095
App. No.
12/208,371
Granted
May 31, 2011
Kind
B2
Abstract

In a display device of the present invention which forms thin film transistors on a substrate, the thin film transistor comprises: a silicon nitride film which is formed on the substrate in a state that the silicon nitride film covers a gate electrode; a silicon oxide film which is selectively formed on the silicon nitride film; a semiconductor layer which is formed at least on an upper surface of the silicon oxide film and includes a pseudo single crystal layer or a polycrystalline layer; and a drain electrode and a source electrode which are formed on an upper surface of the semiconductor layer by way of a contact layer, wherein either one of the pseudo single crystal layer and the poly-crystalline layer is formed by crystallizing the amorphous silicon layer, and a peripheral-side wall surface of the pseudo single crystal layer or the polycrystalline layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the pseudo single crystal layer or the polycrystalline layer without a stepped portion.

Claims (66)

1. A display device, comprising:

a first thin film transistor and a second thin film transistor on a substrate;

wherein the first thin film transistor includes:

a first gate electrode covered by a silicon nitride film,

a silicon oxide film selectively formed on the silicon nitride film,

a first semiconductor layer formed at least on an upper surface of the silicon oxide film and formed of pseudo single crystal silicon or polycrystalline silicon,

a second semiconductor layer formed at least on an upper surface of the first semiconductor layer and formed of amorphous silicon, and

a first drain electrode an a first source electrode which are formed on an upper surface of the second semiconductor layer by way of a first contact layer;

wherein the second thin film transistor includes:

a second gate electrode covered by the silicon nitride film,

a third semiconductor layer formed at least on and in physical contact with an upper surface of the silicon nitride film and formed of amorphous silicon, and

a second drain electrode and a second source electrode which are formed on an upper surface of the third semiconductor layer by way of a second contact layer;

wherein the second gate electrode of the second thin film transistor is formed at the same layer as the first gate electrode of the first film transistor;

wherein the third semiconductor layer of the second thin film transistor is the same layer as the second semiconductor layer of the first thin film transistor;

wherein the second contact layer of the second thin film transistor is the same layer as the first contact layer of the first thin film transistor; and

wherein a peripheral-side wall surface of first semiconductor layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the first semiconductor layer without a stepped portion.

2. A display device according to claim 1 , wherein the second thin film transistors are formed in respective pixels of a display region, and the first thin film transistors are formed in a peripheral circuit around the display region.

3. A display device according to claim 2 , wherein the peripheral circuit includes switching elements which are configured to supply video signals to respective pixels allocated to red(R), green(G) and blue(B) by time-division driving, wherein

the switching element is constituted of the first thin film transistor.

4. A method of manufacturing a display device which forms a first thin film transistor and a second thin film transistor on a substrate of the display device,

wherein the first thin film transistor includes:

a first gate electrode covered by a silicon nitride film,

a silicon oxide film selectively formed on the silicon nitride film,

a first semiconductor layer formed at least on an upper surface of the silicon oxide film and formed of pseudo single crystal silicon or polycrystalline silicon,

a second semiconductor layer formed at least on an upper surface of the first semiconductor layer and formed of amorphous silicon, and

a first drain electrode and a first source electrode which are formed on an upper surface of the second semiconductor layer by way of a first contact layer,

wherein the second thin film transistor includes:

a second gate electrode covered by the silicon nitride film,

a third semiconductor layer formed at least on an upper surface of the silicon nitride film and formed of amorphous silicon,

a second drain electrode and a second source electrode which are formed on and in physical contact with an upper surface of the third semiconductor layer by way of a second contact layer,

wherein the second gate electrode of the second thin film transistor is formed at the same layer as the first gate electrode of the first thin film transistor,

wherein the third semiconductor layer of the second thin film transistor is the same layer as the second semiconductor layer of the first thin film transistor,

wherein the second contact layer of the second thin film transistor is the same layer as the first contact layer of the first thin film transistor, and

wherein the first semiconductor layer is formed by crystallizing an amorphous silicon layer,

the method of manufacturing the display device comprising the steps of:

forming the silicon nitride film, the silicon oxide film and the amorphous silicon layer sequentially and continuously;

forming the first semiconductor layer by selectively crystallizing the amorphous silicon layer; and

etching the silicon oxide film positioned below the amorphous silicon layer at the same time as etching the amorphous silicon layer, while leaving the first semiconductor layer unetched.

5. A display device, comprising:

(1) a first film transistor on a substrate, that includes:

a first gate electrode covered by a silicon nitride film,

a silicon oxide film selectively formed on the silicon nitride film,

a first semiconductor layer formed at least on an upper surface of the silicon oxide film and formed of pseudo single crystal silicon or polycrystalline silicon,

a second semiconductor layer formed at least on an upper surface of the first semiconductor layer and formed of amorphous silicon, and

a first drain electrode and a first source electrode which are formed on an upper surface of the second semiconductor layer by way of a contact layer; and

(2) a second thin film transistor on the substrate, that includes:

a second gate electrode covered by the silicon nitride film, and formed at the same layer as the first gate electrode of the first thin film electrode,

a third semiconductor layer formed at least on and in physical contact with an upper surface of the silicon nitride film and formed of amorphous silicon, the third semiconductor layer being the same layer as the second semiconductor layer of the first thin film transistor, and

a second drain electrode and a second source electrode which are formed on an upper surface of the third semiconductor layer by way of the contact layer;

wherein a peripheral-side wall surface of the first semiconductor layer is contiguously constituted with a peripheral-side wall surface of the silicon oxide film below the first semiconductor layer without a stepped portion.

6. A method of manufacturing a display device which forms a first thin film transistor and a second thin film transistor on a substrate of the display device, the method comprising the steps of:

forming a silicon nitride film, a silicon oxide film and an amorphous silicon layer sequentially and continuously;

forming a first semiconductor layer by selectively crystallizing a portion of the amorphous silicon layer; and

etching the silicon oxide film positioned below the amorphous silicon layer at the same time as etching the amorphous silicon layer, while leaving the first semiconductor layer unetched.

7. The method of manufacturing a display device of claim 6 ,

wherein (1) the first thin film transistor includes:

a first gate electrode covered by a silicon nitride film,

a silicon oxide film selective formed on the silicon nitride film,

a first semiconductor layer, formed by crystallizing an amorphous silicon layer, and formed at least on an upper surface of the silicon oxide film and formed of pseudo single crystal silicon or polycrystalline silicon,

a second semiconductor layer formed at least on an upper surface of the first semiconductor layer and formed of amorphous silicon, and

a first drain electrode and a first source electrode which are formed on an upper surface of the second semiconductor layer by way of a contact layer; and

(2) wherein the second thin film transistor includes:

a second gate electrode covered by the silicon nitride film, the second gate electrode being formed at the same layer as the first gate electrode of the first thin film transistor,

the second semiconductor layer, formed at least on an upper surface of the silicon nitride film and formed of amorphous silicon,

a third semiconductor layer formed at least on an upper surface of the silicon nitride film and formed of amorphous silicon, wherein the third semiconductor layer of the second thin film transistor is the same layer as the second semiconductor layer of the first thin film transistor, and

a second drain electrode and a second source electrode which are formed on and in physical contact with an upper surface of the third semiconductor layer by way of a contact layer.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2025
From: JAPAN DISPLAY INC
To: MAGNOLIA PURPLE CORPORATION
Reel/Frame 071890/0202 →
CHANGE OF NAME Recorded Nov 17, 2023
From: HITACHI DISPLAYS, LTD.
To: JAPAN DISPLAY EAST, INC.
Reel/Frame 065614/0223 →
CHANGE OF NAME Recorded Nov 17, 2023
From: JAPAN DISPLAY EAST, INC.
To: JAPAN DISPLAY, INC.
Reel/Frame 065614/0644 →
CHANGE OF ADDRESS Recorded Nov 17, 2023
From: JAPAN DISPLAY, INC.
To: JAPAN DISPLAY, INC.
Reel/Frame 065654/0250 →
NUNC PRO TUNC ASSIGNMENT Recorded Nov 17, 2023
From: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 065615/0327 →
COMPANY SPLIT PLAN TRANSFERRING FIFTY (50) PERCENT SHARE IN PATENT APPLICATIONS Recorded Oct 20, 2011
From: HITACHI DISPLAYS, LTD.
To: IPS ALPHA SUPPORT CO., LTD.
Reel/Frame 027092/0684 →
MERGER Recorded Oct 20, 2011
From: IPS ALPHA SUPPORT CO., LTD.
To: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
Reel/Frame 027093/0937 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ORIGINAL ELECTRONIC COVER SHEET, THE 5TH INVENTOR'S NAME IS MISSPELLED. SHOULD BE READ: TAKASHINA, PREVIOUSLY RECORDED ON REEL 021512 FRAME 0692. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 1, 2011
From: OUE, EIJI; KAITOH, TAKUO; MIYAKE, HIDEKAZU; MIYAZAWA, TOSHIO; TAKASHINA, YUICHIRO
To: HITACHI DISPLAYS, LTD.
Reel/Frame 026072/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2008
From: OUE, EIJI; KAITOH, TAKUO; MIYAKE, HIDEKAZU; MIYAZAWA, TOSHIO; TAKASHIMA, YUICHIRO
To: HITACHI DISPLAYS, LTD.
Reel/Frame 021512/0692 →
Priority Claims (1)
JP 2007-234836 · Sep 11, 2007 · national
Continuity (1)
Related Publication 20090065777A1 · Mar 12, 2009