IP Library › Granted Patent US 7,957,827
Granted Patent B2
US 7,957,827 · App. 11/965,565 · Granted Jun 7, 2011

Method of controlling statuses of wafers

Assignee: United Microelectronics Corp.
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Quick Facts
Patent No.
US 7,957,827
App. No.
11/965,565
Granted
Jun 7, 2011
Kind
B2
Abstract

A method of controlling statuses of a plurality of wafers is described. A status of a wafer among the wafers is determined. An action related to the status is taken, according to the status determined, to the wafer and/or other wafers to improve a yield or yields thereof.

Claims (8)

1. A method of controlling warpage of a wafer subjected to a plurality of processes, the method being implemented by an IC manufacturing system, and the method comprising:

measuring the warpage of the wafer by using a laser beam to scan a surface of the wafer before the processes are performed; and

making a warp-related setting for at least one of the processes according to the warpage measured to perform the processes for the wafer, such that the warpage of the wafer is within a tolerable range after the processes, wherein

making the warp-related setting for the at least one process comprises: selecting a machine from a plurality of machines by a controller to perform the process for the wafer, the machines being for conducting the same process but cause different warpages to an originally flat dummy wafer.

2. The method of claim 1 , wherein a number of the processes is N (N≧2), further comprising: measuring the warpage of the wafer after the (N−1) th process but before the N th process, and modifying the warp-related setting for the N th process according to the warpage measured after the (N−1) th process but before the N th process.

3. The method of claim 1 , wherein

for some processes, making a warp-related setting for each of them comprises selecting a machine from a plurality of machines that are for conducting the same process but cause different warpages to originally flat dummy wafers; and

for the other processes, making a warp-related setting for each of them comprises adjusting a condition of the process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2007
From: SHIH, HUI-SHEN; CHIEN, YU-FANG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 020310/0674 →
Continuity (1)
Related Publication 20090171495A1 · Jul 2, 2009