Semiconductor integrated circuit wafer, semiconductor integrated circuit chip, and method of testing semiconductor integrated circuit wafer
A semiconductor integrated circuit wafer includes: a plurality of semiconductor integrated circuit regions each of which includes a semiconductor integrated circuit formed thereon; a scribe region which separates the semiconductor integrated circuit regions adjacent to each other; a build in self test (BIST) circuit which is provided in the scribe region and inspects the semiconductor integrated circuit; a connection wiring which is formed ranging from the scribe region to the semiconductor integrated circuit region and connects the semiconductor integrated circuit and the BIST circuit; a BIST switching signal input pad which is provided in the semiconductor integrated circuit region; and a BIST switching circuit which is provided in the semiconductor integrated circuit region and is driven by a driving signal input from the BIST switching signal input pad, the BIST switching circuit including: an input-output pad which connects with the semiconductor integrated circuit; a circuit wiring which connects the input-output pad with the semiconductor integrated circuit; and a switch element which is provided at a middle position of the circuit wiring and is driven by the driving signal input from the BIST switching signal input pad.
1. A semiconductor integrated circuit wafer comprising:
a plurality of semiconductor integrated circuit regions each of which includes a semiconductor integrated circuit formed thereon;
a scribe region which separates said semiconductor integrated circuit regions adjacent to each other;
a build in self test (BIST) circuit which is provided in said scribe region to inspect said semiconductor integrated circuit;
a connection wiring which is formed ranging from said scribe region to said semiconductor integrated circuit region and connects said semiconductor integrated circuit and said BIST circuit;
a BIST switching signal input pad which is provided in said semiconductor integrated circuit region; and
a BIST switching circuit which is provided in said semiconductor integrated circuit region and is driven by a driving signal input from said BIST switching signal input pad, said BIST switching circuit including:
an input-output pad which connects with said semiconductor integrated circuit through a circuit wiring; and
a switch element which is provided at a middle position of said circuit wiring and is driven by said driving signal input from said BIST switching signal input pad.
2. The semiconductor integrated circuit wafer according to claim 1 , wherein said switch element connects said input-output pad with said semiconductor integrated circuit via said circuit wiring during a turn-off state, and blocks said circuit wiring and connects said BIST circuit with said semiconductor integrated circuit via said connection wiring during a turn-on state caused by said driving signal.
3. A semiconductor integrated circuit chip which is obtained by dividing a semiconductor integrated circuit wafer along a scribe region, said semiconductor integrated circuit chip comprising:
a semiconductor integrated circuit;
a build in self test (BIST) switching signal input pad; and
a BIST switching circuit which is driven by a driving signal input from said BIST switching signal input pad, said BIST switching circuit including:
an input-output pad which connects with said semiconductor integrated circuit through a circuit wiring; and
a switch element which is provided at a middle position of said circuit wiring and is driven by said driving signal input from said BIST switching signal input pad.
4. A method of testing a semiconductor integrated circuit included in a semiconductor integrated circuit wafer, said semiconductor integrated circuit wafer including: a plurality of semiconductor integrated circuit regions each formed with said semiconductor integrated circuit; a scribe region which separates said semiconductor integrated circuit regions adjacent to each other; a build in self test (BIST) circuit which is provided in said scribe region; a connection wiring which connects said semiconductor integrated circuit and said BIST circuit; a BIST switching signal input pad which is provided in said semiconductor integrated circuit region, said BIST switching circuit including an input-output pad which connects with said semiconductor integrated circuit through a circuit wiring, and a switch element which is provided at a middle position of said circuit wiring, said method comprising:
connecting a probe pin of a probe card with said BIST circuit and said BIST switching signal input pad;
inputting a driving signal to said BIST switching signal input pad to turn on said switch element in said BIST switching circuit so as to disconnect said circuit wiring and connect said BIST circuit with said semiconductor integrated circuit via said connection wiring;
inputting an information signal to said BIST circuit via said probe pin from a tester; and
inputting said input information signal to said semiconductor integrated circuit via said connection wiring to inspect said semiconductor integrated circuit.