IP Library Granted Patent US 7,994,437
Granted Patent B2
US 7,994,437 · App. 12/801,651 · Granted Aug 9, 2011

Semiconductor device capable of switching operation modes

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 7,994,437
App. No.
12/801,651
Granted
Aug 9, 2011
Kind
B2
Abstract

A semiconductor device includes a substrate, a first internal terminal, a second internal terminal, a third internal terminal, and a fourth internal terminal which are placed along perimeter of the substrate, a circuit formed above the substrate and coupled to the first internal terminal, a first external terminal coupled to the second internal terminal, a second external terminal coupled to the third internal terminal, and a third external terminal coupled to the fourth internal terminal and placed beside one side of the substrate where the second external terminal is located, wherein the circuit generates a signal indicative of a connection state between the first internal terminal and the first external terminal, and wherein the first internal terminal and the second internal terminal are arranged to form two rows in a direction perpendicular to one side of the substrate beside which the first external terminal is placed.

Claims (84)

1. A semiconductor device comprising:

a substrate;

a first internal terminal, a second internal terminal, a third internal terminal, and a fourth internal terminal which are placed along perimeter of the substrate;

a circuit formed above the substrate and coupled to the first internal terminal;

a first external terminal coupled to the second internal terminal;

a second external terminal coupled to the third internal terminal; and

a third external terminal coupled to the fourth internal terminal and placed beside one side of the substrate where the second external terminal is located,

wherein the circuit generates a signal indicative of a connection state between the first internal terminal and the first external terminal, and

wherein the first internal terminal and the second internal terminal are arranged to form two rows in a direction perpendicular to one side of the substrate beside which the first external terminal is placed.

2. The semiconductor device according to claim 1 , further comprising:

a functional block coupled to the circuit, and making a circuit operate in an operation mode that is selected in accordance with the signal.

3. The semiconductor device according to claim 1 ,

wherein the first internal terminal and the second internal terminal are arranged in a zigzag alignment.

4. The semiconductor device according to claim 1 ,

wherein the signal comprises a first signal,

wherein the semiconductor device further comprises:

a fifth internal terminal formed above the substrate and coupled to the circuit, and

wherein the circuit generates a second signal indicative of a connection state between the fifth internal terminal and the first external terminal.

5. The semiconductor device according to claim 4 ,

wherein the first internal terminal and the fifth internal terminal are arranged to form two rows in the direction perpendicular to the one side of the substrate beside which the first external terminal is placed.

6. The semiconductor device according to claim 4 , further comprising:

a functional block coupled to the circuit, and making a circuit operate in an operation mode that is selected in accordance with the first signal and the second signal.

7. The semiconductor device according to claim 1 ,

wherein the signal comprises a first signal,

wherein the semiconductor device further comprises:

a fourth external terminal;

a fifth internal terminal formed above the substrate and coupled to the circuit; and

a sixth internal terminal formed above the substrate and coupled to the fourth external terminal,

wherein the circuit generates a second signal indicative of a connection state between the fifth internal terminal and the fourth external terminal.

8. The semiconductor device according to claim 7 ,

wherein the fifth internal terminal and the sixth internal terminal are arranged to form two rows in the direction perpendicular to the one side of the substrate beside which the first external terminal is placed.

9. The semiconductor device according to claim 1 ,

wherein the first external terminal includes a first lead frame coupled to the second internal terminal by a first wire,

wherein the second external terminal includes a second lead frame coupled to the third internal terminal by a second wire, and

wherein the third external terminal includes a third lead frame coupled to the fourth internal terminal by a third wire.

10. The semiconductor device according to claim 1 ,

wherein the substrate comprises a first substrate,

wherein the semiconductor device further comprises a second substrate,

wherein the first substrate is laid on top of the second substrate,

wherein the first external terminal is formed above the second substrate and includes a first conductor pattern coupled to the second internal terminal by a first wire,

wherein the second external terminal is formed above the second substrate and includes a second conductor pattern coupled to the third internal terminal by a second wire, and

wherein the third external terminal is formed above the second substrate and includes a third conductor pattern coupled to the fourth internal terminal by a third wire.

11. The semiconductor device according to claim 1 ,

wherein the substrate comprises a first substrate,

wherein the semiconductor device further comprises a second substrate,

wherein the first substrate is coupled to the second substrate by a flip chip connection,

wherein the first external terminal is formed above the second substrate and includes a first conductor pattern coupled to the second internal terminal by a first bump,

wherein the second external terminal is formed above the second substrate and includes a second conductor pattern coupled to the third internal terminal by a second bump, and

wherein the third external terminal is formed above the second substrate and includes a third conductor pattern coupled to the fourth internal terminal by a third bump.

12. A semiconductor device comprising:

a substrate;

a first internal terminal, a second internal terminal, a third internal terminal, and a fourth internal terminal which are placed along perimeter of the substrate; and

a circuit formed above the substrate and coupled to the first internal terminal,

wherein the first internal terminal and the second internal terminal are connectable to a first external terminal,

wherein the third internal terminal is connectable to a second external terminal,

wherein the fourth internal terminal is connectable to a third external terminal,

wherein the circuit generates a signal indicative of a connection state between the first internal terminal and the first external terminal, and

wherein the first internal terminal and the second internal terminal are arranged to form two rows in a direction perpendicular to one side of the substrate beside which the first external terminal is placed.

13. The semiconductor device according to claim 12 , further comprising:

a functional block coupled to the circuit, and making a circuit operate in an operation mode that is selected in accordance with the signal.

14. The semiconductor device according to claim 12 ,

wherein the first internal terminal and the second internal terminal are arranged in a zigzag alignment.

15. The semiconductor device according to claim 12 ,

wherein the signal comprises a first signal,

wherein the semiconductor device further comprises:

a fifth internal terminal formed above the substrate and coupled to the circuit, and

wherein the circuit generates a second signal indicative of a connection state between the fifth internal terminal and the first external terminal.

16. The semiconductor device according to claim 15 ,

wherein the first internal terminal and the fifth internal terminal are arranged to form two rows in the direction perpendicular to the one side of the substrate beside which the first external terminal is placed.

17. The semiconductor device according to claim 15 , further comprising:

a functional block coupled to the circuit, and making a circuit operate in an operation mode that is selected in accordance with the first signal and the second signal.

18. The semiconductor device according to claim 12 ,

wherein the signal comprises a first signal,

wherein the semiconductor device further comprises:

a fourth external terminal;

a fifth internal terminal formed above the substrate and coupled to the circuit; and

a sixth internal terminal formed above the substrate and coupled to the fourth external terminal,

wherein the circuit generates a second signal indicative of a connection state between the fifth internal terminal and the fourth external terminal.

19. The semiconductor device according to claim 18 ,

wherein the fifth internal terminal and the sixth internal terminal are arranged to form two rows in the direction perpendicular to the one side of the substrate beside which the first external terminal is placed.

20. The semiconductor device according to claim 12 ,

wherein the first external terminal includes a first lead frame coupled to the second internal terminal by a first wire,

wherein the second external terminal includes a second lead frame coupled to the third internal terminal by a second wire, and

wherein the third external terminal includes a third lead frame coupled to the fourth internal terminal by a third wire.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025191/0916 →
Priority Claims (1)
JP 2008-089789 · Mar 31, 2008 · national
Continuity (2)
Continuation 12222642 · Aug 13, 2008
Related Publication 20100259320A1 · Oct 14, 2010