Semiconductor device and method for manufacturing the same

1. A semiconductor device comprising:

a gate structure which includes a silicon oxynitride (SiON) layer on a semiconductor substrate, a first hafnium silicon oxynitride (HfSiON) layer on the silicon oxynitride (SiON) layer, a second hafnium silicon oxynitride (HfSiON) layer on the first hafnium silicon oxynitride (HfSiON) layer, a polysilicon layer on the hafnium silicon oxynitride (HfSiON) layer, and a silicide layer on the polysilicon layer, the second hafnium silicon oxynitride (HfSiON) layer having a hafnium (Hf) content that is less than that of the first hafnium silicon oxynitride (HfSiON) layer;

spacers at sidewalls of the gate structure; and

source and drain regions disposed at opposite sides of the gate structure.

2. The semiconductor device of claim 1 , wherein the first hafnium silicon oxynitride (HfSiON) layer has a hafnium (Hf) to nitrogen (N) bonding ratio of 40% to 60%, and the second hafnium silicon oxynitride (HfSiON) layer has a hafnium (Hf) to nitrogen (N) bonding ratio of 5% to 10%.

3. The semiconductor device of claim 1 , wherein the polysilicon layer includes fluorine ions.

4. The semiconductor device of claim 1 , further comprising a fluorinated layer comprising implanted fluorine ions, located between the source and drain regions.

5. The semiconductor device of claim 1 , wherein the silicide layer comprises nickel silicide.

6. The semiconductor device of claim 1 , further comprising a silicon-germanium layer on the polysilicon layer.

7. The semiconductor device of claim 1 , wherein the silicide layer is on the silicon-germanium layer.

8. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming a gate structure by the steps of forming a silicon oxide (SiOx) layer on a semiconductor substrate, forming a hafnium silicate (HfSiO) layer on the silicon oxide (SiOx) layer, forming a silicon oxynitride (SiON) layer and a hafnium silicon oxynitride (HfSiON) layer by performing a nitrogen plasma process on the semiconductor substrate including the silicon oxide (SiOx) layer and the hafnium silicate (HfSiO) layer, forming a polysilicon layer on the hafnium silicon oxynitride (HfSiON) layer, growing a silicon germanium (SiGe) layer on the polysilicon layer, and patterning the silicon oxynitride (SiON) layer, the hafnium silicon oxynitride (HfSiON) layer, the polysilicon layer, and the silicon germanium (SiGe) layer;

forming spacers and source and drain regions at sides of the gate structure; and

forming a gate electrode by siliciding the silicon germanium (SiGe) layer.

9. The method of claim 8 , wherein the step of forming the gate electrode includes the steps of:

forming a buffer oxide layer on the semiconductor substrate and exposing the silicon germanium (SiGe) layer by a chemical mechanical polishing (CMP) process;

coating metal on the buffer oxide layer and the silicon germanium (SiGe) layer;

performing a primary heat treatment process on the semiconductor substrate coated with the metal; and

removing a portion of the metal that remains without reacting with the silicon germanium (SiGe) layer and the buffer oxide layer and performing a secondary heat treatment process on a resultant structure.

10. The method of claim 8 , further comprising a step of implanting fluorine ions into the semiconductor substrate before forming the silicon oxide (SiOx) layer on the semiconductor substrate.

11. The method of claim 8 , wherein the step of forming the hafnium silicate (HfSiO) layer includes a step of forming a first hafnium silicate (HfSiO) layer and forming a second hafnium silicate (HfSiO) layer on the first hafnium silicate (HfSiO) layer, the second hafnium silicate (HfSiO) layer having a hafnium (Hf) content that is less than that of the first hafnium silicate (HfSiO) layer.

12. The method of claim 11 , wherein the first hafnium silicate (HfSiO) layer includes hafnium (Hf) in a ratio of 40% to 60%, and the second hafnium silicate (HfSiO) layer includes hafnium (Hf) in a ratio of 5% to 10%.

13. The method of claim 8 , further comprising a step of implanting fluorine ions into the polysilicon layer.

14. A method of manufacturing a semiconductor device, comprising:

forming a silicon oxide (SiOx) layer on a semiconductor substrate,

forming a hafnium silicate (HfSiO) layer on the silicon oxide (SiOx) layer,

forming a silicon oxynitride (SiON) layer and a hafnium silicon oxynitride (HfSiON) layer by performing a nitrogen plasma process on the silicon oxide (SiOx) layer and the hafnium silicate (HfSiO) layer,

forming a polysilicon layer on the hafnium silicon oxynitride (HfSiON) layer,

patterning the silicon oxynitride (SiON) layer, the hafnium silicon oxynitride (HfSiON) layer, and the polysilicon layer;

forming spacers at sides of the gate structure; and

forming source and drain regions in the semiconductor substrate at opposite sides of the gate structure.

15. The method of claim 14 , further comprising growing a silicon germanium (SiGe) layer on the polysilicon layer, wherein the silicon germanium (SiGe) layer is patterned with the SiON layer, the HfSiON layer, and the polysilicon layer.

16. The method of claim 15 , further comprising siliciding the silicon germanium (SiGe) layer to form a silicide layer.

17. The method of claim 16 , wherein siliciding the SiGe layer includes:

forming a buffer oxide layer on the semiconductor substrate;

chemical mechanical polishing (CMP) the buffer oxide layer to expose the silicon germanium (SiGe) layer;

coating metal on the buffer oxide layer and the silicon germanium (SiGe) layer;

heating the semiconductor substrate coated with the metal to form a metal silicide; and

removing an unreacted portion of the metal.

18. The method of claim 17 , further comprising, after removing the unreacted portion of the metal, heating a resultant structure.

19. The method of claim 14 , wherein forming the hafnium silicate (HfSiO) layer includes forming a first hafnium silicate (HfSiO) layer and forming a second hafnium silicate (HfSiO) layer on the first hafnium silicate (HfSiO) layer, the second hafnium silicate (HfSiO) layer having a hafnium (Hf) content that is less than that of the first hafnium silicate (HfSiO) layer.