IP Library Granted Patent US 7,999,607
Granted Patent B2
US 7,999,607 · App. 12/775,209 · Granted Aug 16, 2011

Power switches having positive-channel high dielectric constant insulated gate field effect transistors

Assignee: Intel Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,999,607
App. No.
12/775,209
Granted
Aug 16, 2011
Kind
B2
Abstract

Power switch units for microelectronic devices are disclosed. In one aspect, a microelectronic device may include a functional circuit, and a power switch unit to switch power to the functional circuit on and off. The power switch unit may include a large number of transistors coupled together. The transistors may include predominantly positive-channel, insulated gate field effect transistors, which have a gate dielectric that includes a high dielectric constant material. Power switch units having such transistors may tend to have low power consumption. In an aspect, an overdrive voltage may be applied to the gates of such transistors to further reduce power consumption. Methods of overdriving such transistors and systems including such power switch units are also disclosed.

Claims (26)

1. An apparatus comprising:

a cache memory;

a functional circuit of a microprocessor having multiple cores; and

a power switch unit to switch power to the functional circuit of the microprocessor having multiple cores on and off, the power switch unit including a large number of transistors including at least 100 transistors coupled together in parallel, the at least 100 transistors comprising predominantly positive-channel, insulated gate field effect transistors, which have a gate dielectric that includes a high dielectric constant material,

wherein at least a portion of the power switch unit is included in the cache memory, and

wherein bumps associated with the cache memory are used to conduct unswitched current to the power switch unit.

2. The apparatus of claim 1 , wherein the high dielectric constant material has a higher dielectric constant than silicon dioxide and has a greater valence band offset than conduction band offset.

3. The apparatus of claim 2 , wherein the high dielectric constant material is selected from the group consisting of oxides of hafnium, oxides of tantalum, compounds including barium plus oxides of titanium, compounds including barium plus oxides of zirconium, oxides of zirconium, oxides of aluminum, oxides of yttrium, compounds including zirconium plus oxides of silicon, and combinations thereof.

4. The apparatus of claim 3 , wherein the high dielectric constant material is selected from the group consisting of hafnium dioxide (HfO 2 ), tantalum pentoxide (Ta 2 O 5 ), barium titanate (BaTiO 3 ), barium zirconate (BaZrO 3 ), zirconium dioxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), yttrium oxide (Y 2 O 3 ), zircon (ZrSiO 4 ), and combinations thereof.

5. The apparatus of claim 4 , wherein the high dielectric constant material comprises hafnium dioxide (HfO 2 ).

6. The apparatus of claim 1 , wherein gates of the transistors are coupled to have a voltage that is greater than a voltage at sources of the transistors.

7. The apparatus of claim 6 , wherein the voltage at the gates minus the voltage at the sources is from 0.01V to about 1V.

8. The apparatus of claim 6 , wherein the voltage at the gates minus the voltage at the sources is from 0.1V to about 0.5V.

9. The apparatus of claim 6 , wherein the voltage at the gates minus the voltage at the sources is from 0.2V to about 0.4V.

10. The apparatus of claim 1 , wherein the functional circuit comprises a core of the microprocessor.

11. A system comprising:

a bus;

a dynamic random access memory (DRAM) coupled with the bus; and

an microelectronic device coupled with the bus, the microelectronic device including multiple cores and comprising:

a cache;

a functional circuit; and

a power gate circuit to gate power to the functional circuit, the power gate circuit including at least 100 transistors coupled together, a majority of the transistors being positive-channel, insulated gate field effect transistors that have a gate insulator that includes a high dielectric constant material, wherein at least a portion of the power gate circuit is included in the cache, and wherein bumps associated with the cache are used to conduct unswitched current to the power gate circuit.

12. The system of claim 11 , wherein the high dielectric constant material has a greater valence band offset than conduction band offset.

13. The system of claim 11 , wherein the high dielectric constant material is selected from the group consisting of hafnium dioxide (HfO 2 ), tantalum pentoxide (Ta 2 O 5 ), barium titanate (BaTiO 3 ), barium zirconate (BaZrO 3 ), zirconium dioxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), yttrium oxide (Y 2 O 3 ), zircon (ZrSiO 4 ), and combinations thereof.

14. The system of claim 11 , wherein, when the power gate circuit is off, gates of the transistors are to have a greater voltage than a voltage at sources of the transistors by at least 0.1V.

15. The system of claim 11 , wherein the functional circuit comprises a core.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2014
From: INTEL CORPORATION
To: SONY CORPORATION OF AMERICA
Reel/Frame 032893/0199 →
Continuity (2)
Continuation 11394810 · Mar 31, 2006
Related Publication 20100214005A1 · Aug 26, 2010