IP Library Granted Patent US 8,003,521
Granted Patent B2
US 8,003,521 · App. 12/419,779 · Granted Aug 23, 2011

Semiconductor processing

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Quick Facts
Patent No.
US 8,003,521
App. No.
12/419,779
Granted
Aug 23, 2011
Kind
B2
Abstract

Devices, methods, and systems for semiconductor processing are described herein. A number of method embodiments of semiconductor processing can include forming a silicon layer on a structure, forming an opening through the silicon layer and into the structure, and selectively forming a resistance variable material in the opening such that the resistance variable material does not form on the silicon layer.

Claims (47)

1. A method of semiconductor processing, comprising:

forming a silicon layer on a structure;

forming an opening through the silicon layer and into the structure;

forming in a selective area a resistance variable material in the opening such that the resistance variable material does not form on the silicon layer;

forming a cap in situ on the resistance variable material and silicon layer in a same chamber in which the formation of the resistance variable material occurs; and

removing a portion of the cap that is on the silicon layer.

2. The method of claim 1 , wherein the method includes forming an oxygen barrier on the resistance variable material.

3. The method of claim 2 , wherein forming the oxygen barrier includes sealing the resistance variable material in situ.

4. The method of claim 1 , wherein forming the resistance variable material includes:

reacting a germanium amidinate with NH 3 ; and

reacting Sb(OR) 3 with NH 3 , wherein R is an alkyl.

5. The method of claim 1 , wherein forming the resistance variable material includes:

reacting a germanium amidinate with NH 3 ; and

reacting Te(OR) 4 with NH 3 , wherein R is an alkyl.

6. The method of claim 1 , wherein forming the resistance variable material includes:

reacting Ge(NR 2 ) 4 with NH 3 ; and

reacting Sb(OR) 3 with NH 3 ;

wherein R is an alkyl.

7. The method of claim 1 , wherein forming the resistance variable material includes:

reacting Ge(NR 2 ) 4 with NH 3 ; and

reacting Te(OR) 4 with NH 3 ;

wherein R is an alkyl.

8. The method of claim 1 , wherein the opening has a width less than or equal to 35 nm.

9. A method of semiconductor processing, comprising:

depositing a silicon layer on a structure;

removing a portion of the silicon layer and a portion of the structure to form a cylindrical container therein;

depositing in a selective area a phase change material in the cylindrical container such that no phase change material is deposited on the silicon layer;

forming a cap in situ on the phase change material and silicon layer in a same chamber in which the deposition of the phase change material occurs; and

removing a portion of the cap that is on the silicon layer.

10. The method of claim 9 , wherein the method includes forming the cap in situ on the phase change material such that oxidation of the phase change material is prevented.

11. The method of claim 9 , wherein the cap is an electrode.

12. The method of claim 9 , wherein the phase change material is a Ge—Sb material.

13. The method of claim 9 , wherein the phase change material is a Ge—Te material.

14. The method of claim 9 , wherein the cylindrical container has an aspect ratio greater than or equal to 2:1.

15. A method of semiconductor processing, comprising:

forming a structure on a substrate, wherein the substrate includes an electrode;

forming a silicon layer on the structure;

forming an opening through the silicon layer and the structure, wherein:

a surface of the electrode defines a bottom of the opening;

a first surface of the structure and a first surface of the silicon layer define a first sidewall of the opening; and

a second surface of the structure and a second surface of the silicon layer define a second sidewall of the opening;

forming in a selective area a resistance variable material in the opening such that the resistance variable material does not form on the silicon layer layer;

forming a cap in situ on the resistance variable material and silicon layer in a same chamber in which the formation of the resistance variable material occurs; and

removing a portion of the cap that is on the silicon layer.

16. The method of claim 15 , wherein the method does not include removing any portion of the resistance variable material.

17. The method of claim 15 , wherein forming the resistance variable material includes forming the resistance variable material such that the resistance variable material covers the bottom of the opening and the first and second surfaces of the structure but not the first and second surfaces of the silicon layer.

18. The method of claim 15 , wherein forming the resistance variable material includes forming the resistance variable material such that the resistance variable material fills a portion of the opening formed by the bottom of the opening and the first and second surfaces of the structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2016
From: MICRON TECHNOLOGY, INC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039974/0496 →