Image display device
The present invention provide an image display device including a level shift circuit not requiring a clock signal nor a control signal from the outside and operating at a low voltage and ensuring a high yield. The level shift circuit comprises a pair of transistors each having a source electrode connected to a power, a gate electrode and a drain electrode (the gate electrode and the drain electrode of one of the transistors being connected with the drain electrode and the gate electrode of the other (cross coupling)); and transistors each having an a source electrode connected to a low voltage source or the ground, a drain electrode connected to a connection point for the cross coupling, and a gate electrode, one of the gate electrodes being connected to an input signal and the other being connected to an input inversion signal. The level shift circuit has also a transistor having a gate electrode connected to a connection point for the cross-coupling, a drain electrode connected to a connection point for cross-coupling forming a pair with the cross-coupling connection point, and a source electrode, one of the source electrodes being connected to an input signal and the other being connected to an input inversion signal. The transistor with at least the gate electrode connected to the cross-coupling connection point is a TFT formed on an insulating substrate.
1. An image display device comprising:
a pixel block having a plurality of pixel circuits arranged on an image display panel in a matrix form;
a gate driver section which generates a signal for scanning each of the pixel circuits;
a data driver section which supplies a video signal via a data signal line to each of the pixel circuits;
a protection circuit block; and
a level shift circuit which converts a low amplitude signal to a high amplitude signal and which transmits the high amplitude signal to the gate driver section and the data driver section,
wherein the level shift circuit includes
a first PMOS transistor and a second PMOS transistor each having a source electrode connected to a power voltage and a gate electrode and a drain electrode, the gate electrode of the first PMOS transistor being connected to the drain electrode of the second PMOS transistor, the drain electrode of the first PMOS transistor being connected to the gate electrode of the second PMOS transistor;
a first NMOS transistor having a source electrode connected to ground, a drain electrode connected to the drain electrode of the first PMOS transistor via the protection circuit block, and a gate electrode connected to an input terminal;
a second NMOS transistor having a source electrode connected to ground, a drain electrode connected to the drain electrode of the second PMOS transistor via the protection circuit block, and a gate electrode connected to an input inverting terminal;
a third NMOS transistor having a gate electrode connected to the drain electrode of the first NMOS transistor via the protection circuit block and to the drain electrode of the first PMOS transistor, a drain electrode connected to the drain electrode of the second NMOS transistor via the protection circuit block, and a source electrode connected to the gate electrode of the first NMOS transistor via the protection circuit block; and
a fourth NMOS transistor having a gate electrode connected to the drain electrode of the second NMOS transistor via the protection circuit block and to the drain electrode of the second PMOS transistor, a drain electrode connected to the drain electrode of the first NMOS transistor via the protection circuit block, and a source electrode connected to the gate electrode of the second NMOS transistor via the protection circuit block,
wherein the pixel block, the gate driver section, the data driver section, the protection circuit block, the first and second PMOS transistors, and the third and fourth NMOS transistors are comprised of TFT devices formed on a glass substrate, and
wherein the first and second NMOS transistors are monocrystal silicon semiconductor devices formed on a semiconductor substrate.
2. An image display device comprising:
a pixel block having a plurality of pixel circuits arranged on an image display panel in the matrix form;
a gate driver section which generates a signal for scanning each of the pixel circuit;
a data driver section which supplies a video signal via a data signal line to each of the pixel circuits;
a protection circuit block; and
a level shift circuit which converts a low amplitude signal to a high amplitude signal and which transmits the high amplitude signal to the gate driver section and the data driver section,
wherein the level shift circuit includes
a first NMOS transistor and a second NMOS transistor each having a source electrode connected to a low voltage source, a gate electrode and a drain electrode, the gate electrode of the first NMOS transistor being connected with the drain electrode of the second NMOS transistor, the drain electrode of the first NMOS transistor being connected with the gate electrode of the second NMOS transistor;
a first PMOS transistor having a source electrode connected to a high voltage source, a drain electrode connected to the drain electrode of the first NMOS transistor via the protection circuit block, and a gate electrode connected to an input terminal;
a second PMOS transistor having a source electrode connected to the high voltage source, a drain electrode connected to the drain electrode of the second NMOS transistor via the protection circuit block, and a gate electrode connected to an input inverting terminal;
a third PMOS transistor having a gate electrode connected to the drain electrode of the first PMOS transistor via the protection circuit block and to drain electrode of the first NMOS transistor, a drain electrode connected to the drain electrode of the second PMOS transistor via the protection circuit block, and a source electrode connected to the gate electrode of the first NMOS transistor via the protection circuit block; and
a fourth PMOS transistor having a gate electrode connected to the drain electrode of the second PMOS transistor via the protection circuit block and to the drain electrode of the second NMOS transistor, a drain electrode connected to the drain electrode of the second PMOS transistor via the protection circuit block, and a source electrode connected to the gate electrode of the second PMOS transistor via the protection circuit block,
wherein the pixel block, the gate driver section, the data driver section, the protection circuit block, the first and second NMOS transistors, and the third and fourth PMOS transistors are comprised of TFT devices formed on a glass substrate, and
wherein the first and second PMOS transistors are monocrystal silicon semiconductor devices formed on a semiconductor substrate.
3. The image display device according to claim 1 ,
wherein sizes W/L of the transistors constituting a circuit are 50/4 or below.
4. The image display device according to claim 1 ,
wherein a transistor used in the image display panel is a TFT.
5. The image display device according to claim 1 , wherein each of pixel circuits arranged in a matrix form in the pixel block includes:
a switching transistor;
a liquid crystal;
a data signal line for supplying a video signal to the liquid crystal when the switching transistor is ON; and
a gate signal line for supplying a scanning signal to a gate electrode of the switching transistor.
6. The image display device according to claim 1 , each of the pixel circuits arranged in a matrix form in the pixel block comprises:
a switching transistor;
a current-driven light-emitting device;
a drive transistor for the current-driven light-emitting device;
a data signal line for supplying a video signal to a gate electrode of the drive transistor for the current-driven light-emitting device when the switching transistor is ON;
a gate signal line for supplying a scanning signal to a gate electrode of the switching transistor;
a power supply line for supplying a drive current to the current-driven light-emitting device; and
a capacitor for storing therein data.
7. The image display device according to claim 1 ,
wherein the input signal includes:
a driver control signal that is generated by a circuit formed with a monocrystal silicon semiconductor device and that is supplied via the level shift circuit to a gate driver section; and
a data driver control signal that is generated by a circuit formed with a monocrystal silicon semiconductor device and that is supplied via the level shift circuit to the data driver section.
8. The image display device according to claim 1 ,
wherein a video signal supplied through the data signal line is supplied via a driver IC, the level shift circuit and the data driver section to the pixel circuit.
9. The image display device according to claim 2 ,
wherein sizes W/L of the transistors constituting a circuit are 50/4 or below.
10. The image display device according to claim 2 ,
wherein a transistor used in the image display panel is a TFT.
11. The image display device according to claim 2 ,
wherein each of the pixel circuits arranged in a matrix form comprises:
a switching transistor;
a liquid crystal;
a data signal line for supplying a video signal to the liquid crystal when the switching transistor is ON; and
a gate signal line for supplying a scanning signal to a gate electrode of the switching transistor.
12. The image display device according to claim 2 ,
wherein each of the pixel circuits arranged in a matrix form comprises:
a switching transistor;
a current-driven light-emitting device;
a drive transistor for the current-driven light-emitting device;
a data signal line for supplying a video signal to a gate electrode of the driver transistor when the switching transistor is ON;
a gate signal line for supplying a scanning signal to a gate electrode of the switching transistor;
a power supply line for supplying a drive current to the current-driven light-emitting device; and
a capacitor for storing data therein.
13. The image display device according to claim 2 ,
the input signal includes:
a gate driver control signal that is generated by a circuit formed with a monocrystal silicon semiconductor device and that is supplied via the level shift block to the gate driver section; and
a data driver control signal that is generated by a circuit formed with a monocrystal silicon semiconductor device and that is supplied via the level shift block to the data driver section.
14. The image display section according to claim 2 ,
wherein a video signal supplied through the data signal line is supplied via a driver IC, the level shift block and the data driver section to the pixel circuit.