IP Library Granted Patent US 8,037,102
Granted Patent B2
US 8,037,102 · App. 11/005,859 · Granted Oct 11, 2011

Manipulating sets of hierarchical data

Assignee: Robert T. and Virginia T. Jenkins
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Quick Facts
Patent No.
US 8,037,102
App. No.
11/005,859
Granted
Oct 11, 2011
Kind
B2
Abstract

Embodiments of methods, apparatuses, devices and/or systems for manipulating hierarchical sets of data are disclosed. In particular embodiments, such hierarchical sets of data may be expressed as trees and/or strings. Further, such trees and/or strings may be associated with numerals. In other particular embodiments, operations on numerals associated with trees may be associated with manipulations of such trees.

Claims (41)

1. A method comprising: executing instructions on a processor to:

convert electrical digital signals representing at least two edge or node labeled trees to one or more electrical digital signals representing numerals, said numerals being selected from a set of numerals according to a one to one association between edge or node labeled trees and numerals in said set;

multiply said signals representing said numerals to provide one or more electrical digital signals representing a product of said numerals; and

convert the one or more signals representing said product to one or more electrical digital signals representing a resulting edge or node labeled tree, wherein said product is a member of said set of numerals associated with said resulting tree according to said association between edge or node labeled trees and numerals, wherein said resulting edge or node labeled tree comprises a combination of said at least two edge or node labeled trees and is stored in memory or displayed in a hierarchical format on a display device.

2. The method of claim 1 , wherein said trees comprise binary edge labeled trees.

3. The method of claim 1 , wherein said signals representing said at least two trees are converted to one or more electrical digital signals representing binary edge labeled trees.

4. The method of claim 1 , wherein at least one of said at least two trees includes at least one null label.

5. The method of claim 4 , wherein said at least one of said at least two trees that includes at least one null label is converted to a tree without a null label.

6. The method of claim 5 , wherein said tree without a null type is converted to a binary edge labeled tree.

7. The method of claim 1 , wherein said signals representing said at least two trees are converted to one or more electrical digital signals representing binary node labeled trees.

8. The method of claim 1 , wherein said numerals comprise binary numerals.

9. The method of claim 1 , wherein said signals representing said numerals are converted to one or more electrical digital signals representing binary numerals.

10. An apparatus comprising:

a computing platform; said computing platform comprising one or more processors programmed with instructions executable by said one or more processors to:

convert electrical digital signals representing at least two edge or node labeled trees to electrical digital signals representing numerals, said numerals being selected from a set of numerals according to a one to one association between edge or node labeled trees and numerals in said set;

multiply said signals representing said numerals to provide one or more digital signals representing a product of said numerals; and

convert said signals representing the product of said at least two numerals to one or more signals representing a resulting edge or node labeled tree, wherein said product is a member of said set of numerals associated with said resulting tree according to said association between trees and numerals, wherein said resulting edge or node labeled tree comprises a combination of said at least two edge or node labeled trees and is stored in memory or displayed in a hierarchical format on a display device.

11. The apparatus of claim 10 , wherein said at least two trees comprise binary edge labeled trees.

12. The apparatus of claim 10 , wherein said one or more processors are further programmed with instructions executable by said one or more processors to convert signals representing said at least two trees to one or more electrical digital signals representing binary edge labeled trees.

13. The apparatus of claim 10 , wherein at least one of said at least two trees includes at least one null label.

14. The apparatus of claim 13 , wherein said one or more processors is further programmed with instructions executable by said one or more processors to convert said one or more signals representing said at least one of said at least two trees that includes at least one null label to one or more electrical digital signals representing a tree without a null label.

15. The apparatus of claim 14 , wherein said one or more processors is further programmed with instructions executable by said one or more processors to convert said one or more signals representing said tree without a null type to one or more electrical digital signals representing a binary edge labeled tree.

16. The apparatus of claim 10 , wherein said one or more processors are further programmed with instructions executable by said one or more processors to convert said one or more signals representing said at least two trees to one or more electrical digital signals representing binary node labeled trees.

17. The apparatus of claim 10 , wherein said numerals comprise binary numerals.

18. The apparatus of claim 10 , wherein said one or more processors is further programmed with instructions executable by said one or more processors to convert said signals representing said numerals to one or more electrical digital signals representing binary numerals.

19. An article comprising:

a storage medium comprising machine-readable instructions stored thereon executable by a processor to:

convert one or more electrical digital signals representing at least two edge or node labeled trees to one or more digital signals representing numerals, said numerals being selected from a set of numerals according to a one to one association between edge or node labeled trees and numerals in said set;

multiply one or more electrical digital signals representing said numerals to provide one or more electrical digital signals representing a product; and

convert said one or more signals representing the product of said numerals to one or more signals representing a resulting edge or node labeled tree, wherein said product is a member of said set of numerals associated with said resulting tree according to said association between trees and numerals, wherein said resulting edge or node labeled tree comprises a combination of said at least two edge or node labeled trees and is stored in memory or displayed in a hierarchical format on a display device.

20. The article of claim 19 , wherein said trees comprise binary edge labeled trees.

21. The article of claim 19 , wherein said instructions are further executable by said processor to convert said signals representing said at least two trees to one or more electrical digital signals representing binary edge labeled trees.

22. The article of claim 19 , wherein at least one of said at least two trees includes at least one null label.

23. The article of claim 22 , wherein said instructions are further executable by said processor to convert said signals representing said at least one of said at least two trees that includes at least one null label to one or more electrical digital signals representing a tree without a null label.

24. The article of claim 23 , wherein said instructions are further executable by said processor to convert one or more signals representing said tree without a null type to one or more signals representing a binary edge labeled tree.

25. The article of claim 19 , wherein said instructions are further executable by said processor to convert one or more signals representing said at least two trees to one or more signals representing binary node labeled trees.

26. The article of claim 19 , wherein said numerals comprise binary numerals.

27. The article of claim 19 , wherein said instructions are further executable by said processor to convert said one or more signals representing said numerals to one or more electrical digital signals representing binary numerals.

28. The method of claim 1 , wherein said processor comprises a hierarchy manipulation processor programmed with instructions executable to perform tree hierarchy manipulation.

29. The apparatus of claim 10 , wherein said one or more processors comprise a hierarchy manipulation processor programmed with instructions executable to perform tree hierarchy manipulation.

30. The article of claim 19 , wherein said processor comprises a hierarchy manipulation processor programmed with instructions executable to perform tree hierarchy manipulation.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2022
From: ROBERT T. AND VIRGINIA T. JENKINS AS TRUSTEES OF THE JENKINS FAMILY TRUST DATED FEB. 8, 2002
To: LOWER48 IP LLC
Reel/Frame 061881/0304 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE TO ROBERT T AND VIRGINIA T JENKINS PREVIOUSLY RECORDED AT REEL: 024410 FRAME: 0471. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 21, 2021
From: ROBERT T. AND VIRGINIA T. JENKINS
To: ROBERT T. AND VIRGINIA T. JENKINS AS TRUSTEES OF THE JENKINS FAMILY TRUST DATED FEB. 8, 2002
Reel/Frame 055997/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2011
From: LETOURNEAU, JACK J.
To: SKYLER TECHNOLOGY, INC.
Reel/Frame 026883/0451 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2010
From: SKYLER TECHNOLOGY, INC.
To: JENKINS, ROBERT T.; JENKINS, VIRGINIA T.
Reel/Frame 024410/0471 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2010
From: LETOURNEAU, J. J.
To: SKYLER TECHNOLOGIES INC.
Reel/Frame 023987/0064 →
Continuity (2)
Provisional Application 60543371 · Feb 9, 2004
Related Publication 20050187900A1 · Aug 25, 2005