Method of fabricating semiconductor device, and plating apparatus

1. A method of fabricating a semiconductor device having a plating process of filling a plurality of recesses provided to an insulating film formed on a substrate with an electro-conductive material, comprising the steps of:

determining a first surface area S 1 of over an entire surface of said substrate which includes the area of side walls of said plurality of recesses over the entire surface of said substrate;

determining a second surface area S 2 of over an entire surface of said substrate which excludes said area of side walls of said plurality of recesses;

determining a ratio of surface area Sr=S 1 /S 2 ; and

performing the plating with a first current density when fine recesses not larger than a predetermined width, out of all of said plurality of recesses, are filled with said electro-conductive material, said first current density being obtained by correcting a predetermined first reference current density based on the determined ratio of surface area Sr=S 1 /S 2 .

2. The method of fabricating a semiconductor device as claimed in claim 1 , wherein, said first reference current density is set on the basis of said second surface area S 2 , and said first current density is a product of said first reference current density and said ratio of surface area Sr.

3. The method of fabricating a semiconductor device as claimed in claim 1 , wherein said first current density is set so as to make effective current density, which is obtained by dividing said first current density with said ratio of surface area Sr, fall within a predetermined range.

4. The method of fabricating a semiconductor device as claimed in claim 3 , wherein said predetermined range is equal to or more than 2 mA/cm 2 and equal to or less than 6.5 mA/cm 2 .

5. The method of fabricating a semiconductor device as claimed in claim 3 , further including grouping said ratio of surface area Sr by predetermined ranges, and setting said first current density for every said group, wherein, in said performing the plating with said first current density, said first current density is set for said group containing said grouped ratio of surface area Sr.

6. The method of fabricating a semiconductor device as claimed in claim 1 , wherein said plating process further includes processing the plating with a second current density different from said first current density, after said fine recesses not larger than said predetermined width, out of all of said plurality of recesses, are filled with said electro-conductive material, so as to fill said plurality of recesses with said electro-conductive material.

7. The method of fabricating a semiconductor device as claimed in claim 6 , wherein said first reference current density is smaller than said second current density.

8. The method of fabricating a semiconductor device as claimed in claim 6 , wherein said second current density is a second reference current density set on the basis of said second surface area S 2 .

9. The method of fabricating a semiconductor device as claimed in claim 6 , wherein said second current density is obtained by correcting a second reference current density set on the basis of said second surface area S 2 , based on ratio of surface area Sr=S 3 /S 4 of a third surface area S 3 over the entire surface of said substrate which includes the area of side walls of said plurality of recesses over the entire surface of said substrate, at the point of time when said fine recesses not larger than said predetermined width, out of all of said plurality of recesses, are filled with said electro-conductive material, and a fourth surface area S 4 over the entire surface of said substrate which does not include said area of side walls of said plurality of recesses.

10. The method of fabricating a semiconductor device as claimed in claim 1 , wherein in performing the plating with said first current density, considering that said first surface area S 1 varies with progress of said plating, said first current density is obtained by correcting said first reference current density based on the ratio of surface area Sr, said ratio of surface area Sr being calculated, at a certain stage in the course of plating, by dividing a value of said first surface area S 1 achieved at said stage with said second surface area S 2 .

11. The method of fabricating a semiconductor device as claimed in claim 1 , wherein said predetermined width is 0.3 μm.

12. The method of fabricating a semiconductor device as claimed in claim 1 , further comprising judging whether said ratio of surface area Sr falls in a predetermined range or not, before said performing the plating with said first current density, wherein when said ratio of surface area Sr is judged as being in said predetermined range, allowing said performing the plating with said first current density, and when said ratio of surface area Sr is judged as being out of said predetermined range, allowing said performing the plating with said first reference current density instead of using said first current density.

13. The method of fabricating a semiconductor device as claimed in claim 12 , wherein said predetermined range is 1.4 or larger.

14. The method of fabricating a semiconductor device as claimed in claim 1 , wherein said first current density is set larger as said ratio of surface area Sr becomes larger.

15. The method of fabricating a semiconductor device as claimed in claim 12 , wherein when said ratio of surface area Sr is judged as being in said predetermined range, the plating process is proceeded in two steps in which one of said first current density and another current density is used, respectively, and when said ratio of surface area Sr is judged as being out of said predetermined range, the plating process is proceeded in one step using said first reference current density.