Method of fabricating a liquid crystal display device using gate and common links to link gate and common lines to gate and common pads

1. A method of fabricating a liquid crystal display device, comprising:

providing first and second substrates having a liquid crystal region, a sealant region, and an outer region;

forming a wiring on the first substrate, wherein the wiring crosses the sealant region;

forming an inorganic insulating film on the wiring;

forming an organic insulating film on the inorganic insulating film, wherein a portion of the inorganic insulating film is exposed in the sealant region; and

forming a liquid crystal layer between the first and second substrates using a sealant,

wherein forming the wiring includes:

forming a gate line and a first common line in the liquid crystal region, a gate pad lower electrode and a common pad lower electrode in the outer region, a common link connected to the common pad lower electrode and crossing the sealant region, and a gate link connecting the gate line to the gate pad lower electrode across the sealant region;

forming a second common line on the inorganic insulating film, the second common line crossing the gate line;

exposing a portion of the common pad lower electrode, a portion of the first common line, a portion of the second common line, and a portion of the common link when patterning the organic insulating film;

exposing the gate pad lower electrode and the first common line when patterning the inorganic insulating film; and

forming a gate pad upper electrode connected to the exposed gate pad lower electrode, a common pad upper electrode connected to the portion of the common pad lower electrode, a first contact electrode connected to the portion of the first common electrode and the portion of the second common lines, and a second contact electrode connected to the portion of the second common line and the portion of the common link.

2. The method of claim 1 , wherein forming the inorganic insulating film includes patterning the inorganic insulating film.

3. The method of claim 1 , wherein a portion of the first substrate is exposed between the wiring in the sealant region.

4. The method of claim 1 , wherein forming the organic insulating film includes forming an organic insulating film that overlaps a portion of the sealant region.

5. The method of claim 4 , further comprising forming a dummy pattern between the inorganic insulating film and the organic insulating film.

6. The method of claim 5 , wherein the dummy pattern overlaps the sealant region and includes metal.

7. The method of claim 5 , wherein forming a dummy pattern includes forming a semiconductor layer underneath the dummy pattern.

8. The method of claim 1 , further comprising forming a dummy protective pattern on the organic insulating film in a region where the organic insulating film overlaps the sealant region.

9. The method of claim 8 , wherein forming a dummy protective pattern includes forming a transparent conductive layer.

10. The method of claim 1 , further comprising forming a second inorganic insulating film between the inorganic insulating film and the organic insulating film.

11. The method of claim 10 , wherein the second insulating film has a substantially similar shape to the organic insulating film.

12. The method of claim 1 , further comprising:

attaching a tape carrier package with a pad area having at least one of a gate pad and a data pad through an anisotropic conductive film; and

sealing the tape carrier package and the pad area using a second sealant.

13. The method of claim 12 , wherein the second sealant surrounds a periphery of the tape carrier package.