IP Library › Granted Patent US 8,110,932
Granted Patent B2
US 8,110,932 · App. 11/871,735 · Granted Feb 7, 2012

Semiconductor circuit with amplifier, bond wires and inductance compensating bond wire

Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 8,110,932
App. No.
11/871,735
Granted
Feb 7, 2012
Kind
B2
Abstract

In one embodiment of the present invention, a semiconductor circuit including an amplifier disposed on a semiconductor substrate is disclosed. A first bond wire coupled to an input of the amplifier, a second bond wire coupled to an output of the amplifier, and a third bond wire coupled in series with the first bond wire. A third bond wire is disposed on the semiconductor substrate so that a mutual inductance between the second bond wire and the third bond wire at least partially cancels a mutual inductance between the first bond wire and the second bond wire.

Claims (32)

1. A semiconductor circuit comprising:

an amplifier disposed on a semiconductor substrate;

a first bond wire coupled to an input of the amplifier;

a second bond wire coupled to an output of the amplifier; and

a third bond wire coupled in series with the first bond wire, wherein a mutual inductance between the second bond wire and the third bond wire at least partially cancels a mutual inductance between the first bond wire and the second bond wire, wherein a first end of the third bond wire is bonded to a first bonding pad disposed on the semiconductor substrate, and a second end of the third bond wire is bonded to a second bonding pad disposed on the semiconductor substrate.

2. The semiconductor circuit of claim 1 , wherein a first end of the first bond wire is coupled to a lead frame.

3. The semiconductor circuit of claim 2 , wherein a first end of the second bond wire is coupled to the lead frame.

4. The semiconductor circuit of claim 1 , wherein the first bond wire is oriented in a first direction and the third bond wire is oriented in a second direction, the second direction being opposite to the first direction.

5. The semiconductor circuit of claim 4 , wherein at least a portion of the first bond wire is adjacent to the second bond wire.

6. The semiconductor circuit of claim 1 , further comprising a fourth bond wire coupled to the output of the amplifier.

7. The semiconductor circuit of claim 6 , wherein a first end of the fourth bond wire is coupled to a lead frame, and wherein a first end and a second end of the second bond wire are coupled to bond pads disposed on the semiconductor substrate.

8. The semiconductor circuit of claim 7 , further comprising an output matching network, wherein the output matching network comprises the second bond wire.

9. The semiconductor circuit of claim 1 , wherein the third bond wire further cancels an other mutual inductance present within the semiconductor circuit.

10. The semiconductor circuit of claim 1 , wherein the amplifier comprises a gain of at least 20 dB.

11. A semiconductor circuit comprising:

an amplifier disposed on a semiconductor substrate;

an input bond wire comprising a first end and a second end, the first end coupled to a lead frame, and the second end coupled to an input of the amplifier;

an output bond wire comprising a first end and a second end, the first end coupled to the lead frame, and the second end coupled to an output of the amplifier;

a matching network comprising a matching bond wire coupled to the output of the amplifier, wherein

the matching bond wire presents a mutual inductance to the input bond wire; and

a compensating bond wire coupled in series with the input bond wire to the input of the amplifier, wherein the compensating bond wire presents a mutual inductance to the matching bond wire with a polarity opposite the mutual inductance between the matching bond wire and the input bond wire, the compensating bond wire comprising a first end affixed to a first bonding pad disposed on the semiconductor substrate, and a second end affixed to a second bonding pad disposed on the semiconductor substrate.

12. The semiconductor circuit of claim 11 , wherein the matching bond wire comprises a first end affixed to a third bonding pad disposed on the semiconductor substrate, and a second end affixed to a fourth bonding pad disposed on the semiconductor substrate.

13. The semiconductor circuit of claim 12 , wherein lengths and bonding pad positions of the matching bond wire and the compensating bond wire are optimized to provide an output match and a stable amplifier.

14. The semiconductor circuit of claim 11 , wherein the matching network comprises a plurality of matching bond wires.

15. The semiconductor circuit of claim 11 , further comprising at least one further compensating bond wire.

16. A semiconductor circuit comprising:

an amplifier disposed on a semiconductor substrate;

a first bond wire coupled to an input of the amplifier;

a second bond wire coupled to an output of the amplifier, wherein the second bond wire comprises a first end coupled to a first bonding pad disposed on the semiconductor substrate and a second end coupled to a second bonding pad disposed on the semiconductor substrate;

a third bond wire coupled in series with the first bond wire, wherein a mutual inductance between the second bond wire and the third bond wire at least partially cancels a mutual inductance between the first bond wire and the second bond wire; and

a fourth bond wire comprising a first end coupled to a lead frame.

17. The semiconductor circuit of claim 16 , further comprising an output matching network, wherein the output matching network comprises the second bond wire.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2007
From: SJOESTROEM, JOHAN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 020033/0218 →
Continuity (1)
Related Publication 20090096068A1 · Apr 16, 2009