Semiconductor device and fabrication method for the same
A semiconductor device includes a substrate; a nitride based compound semiconductor layer placed on the substrate; an active area which is placed on the nitride based compound semiconductor layer, and is composed of an aluminum gallium nitride layer (Al x Ga 1-x N) (where 0.1<=x<=1); an isolation region which performs isolation of the active area mutually; a gate electrode, a source electrode, and a drain electrode which have been placed on the active area surrounded by the isolation region; and a trench region formed by etching for a part of the active area under the gate electrode. The semiconductor device is highly reliable, high performance and high power and a fabrication method for the same is also provided.
1. A nitride based semiconductor device comprising:
a substrate;
a nitride based compound semiconductor layer placed on the substrate;
an active area which is placed on the nitride based compound semiconductor layer, and is composed of an aluminum gallium nitride layer (Al x Ga 1-x N) (where 0.1<=x<=1);
an isolation region which performs isolation of the active area;
a trench region formed by etching a part of the active area directly under a gate electrode subsequently to be disposed on the active area; and
the gate electrode, a source electrode, and a drain electrode which are placed on the active area surrounded by the isolation region, wherein
the trench region is formed including a part of the active area directly under the gate electrode, in a tip region of said gate electrode.
2. The nitride based semiconductor device according to claim 1 , wherein
the isolation region is formed to a part of depth direction of the aluminum gallium nitride layer (Al x Ga 1-x N) (where 0.1<=x<=1) and the nitride based compound semiconductor layer.
3. The nitride based semiconductor device according to claim 1 further comprising:
a gate terminal electrode which is connected to the gate electrode and is placed on the isolation region, wherein
the trench region is formed including a part of the active area between the gate electrode and the gate terminal electrode.
4. The nitride based semiconductor device according to claim 1 , wherein
the isolation region is formed by ion implantation.
5. The nitride based semiconductor device according to claim 1 , wherein
the gate electrode, the source electrode, and the drain electrode comprises a plurality of fingers, respectively, and
the nitride based semiconductor device further comprises a gate terminal electrode, a source terminal electrode, and a drain terminal electrode which are placed on the first surface of the substrate, govern a plurality of fingers, respectively and are formed for every the gate electrode, the source electrode, and the drain electrode.
6. A fabrication method for a nitride based semiconductor device comprising:
forming a nitride based compound semiconductor layer on a substrate;
forming an active area composed of an aluminum gallium nitride layer (Al x Ga 1-x N) (where 0.1<=x<=1) on the nitride based compound semiconductor layer;
forming an isolation region which performs isolation of the active area;
etching a part of the active area to form a trench region directly under a gate electrode subsequently to be disposed on the active area; and
forming the gate electrode, a source electrode, and a drain electrode on the active area surrounded by the isolation region, wherein
in the step of forming the trench region, the trench region is formed including the a part of active area directly under the gate electrode, in a tip region of the gate electrode.
7. The fabrication method for the nitride based semiconductor device according to claim 6 , wherein
in the step of forming the isolation region, the isolation region is formed to a part of depth direction of the aluminum gallium nitride layer (Al x Ga 1-x N) (where 0.1<=x<=1) and the nitride based compound semiconductor layer.
8. The fabrication method for the nitride based semiconductor device according to claim 6 further comprising:
forming a gate terminal electrode connected to said gate electrode on the isolation region, wherein
the trench region is formed including a part of the active area between the gate electrode and the gate terminal electrode.